My first Eagle SCH/PCB, review?

[TriodeTiger]

I finally learned how easy it was to associate and make footprints for my components, so I decided to start making my silly first project (a lab multimeter) and naturally started with the PSU. I thought.. Why not practise by making it its own mini-module kind of board?

Here's my resulting schematic fresh from Eagle:



The frames were a little too large for just that, so hopefully my silly frame with the wire tool is not ugly or too wrong..

I liked my fuse tester, makes sense, and the p-mos has a -1.5Vgs threshold at 25C, so, easily attainable (5-0=-5V when fuse blown.)

Next, my PCB .. I went a little far on it as you may see:



A few questions...

1. My designs check out on Lane's OSHPark DRC, but I am curious, would my silkscreen become blocky with its detail or will the machine be sharp enough to roughly make such a design as that? Would it work better if it were larger, I made it more sharper?

2. Am I free to abuse the pad layer to make some shiny text on my PCB? (top-right, the (c) et. al.) I just hit "approve" on the ERC's amusing mentioning of abusing it, or is there a way to lift the solder mask in key positions? If I want to make a test pad, do I just make a device with a pad without a drill hole?

3. Should I have left all GND connections out, and just do the fill after? The traces seem to be there and movable independent of the fill even though they just sink back in to it once placed, or is that fine?

4. Most of my LEDs/buttons/ etc. will be put on to leads and mounted on the front panel. Should I create dummy LEDs with jumper connections and alike, or just use the button/LED footprints as I am doing here and feed wires from them? That may actually help a bit with pinouts I suppose.

I hope I remembered all I was going to ask.

I don't like the gimmicky look of vector font for component designators (a board sitting in front of me of something else, it looks kinda .. trying too hard to look cool so I used proportional. Words though seem to look quite technical in vector font however.

Any tips? Are my silkscreen positions not too horrible? I love the puzzle of making a single-sided board, too, really not as hard as I thought.

Board roughly 2x1.5'', hope I increased the trace width for the power correctly but I suppose I should research curr..ampacity? No excuses! lets see.. 30.8 mil said for a calculator (1oz, 2A, in air) and mine is 24 mil, suppose I should increase that! Learning. Fun. 

  no more rambling.

TriodeTiger.

[miceuz]

2. Am I free to abuse the pad layer to make some shiny text on my PCB? (top-right, the (c) et. al.) I just hit "approve" on the ERC's amusing mentioning of abusing it, or is there a way to lift the solder mask in key positions? If I want to make a test pad, do I just make a device with a pad without a drill hole?

Yes, you just draw on soldermask layer.
I think there is a testpoint symbol/footprint in a standard Eagle library.

3. Should I have left all GND connections out, and just do the fill after? The traces seem to be there and movable independent of the fill even though they just sink back in to it once placed, or is that fine?

There is no need to route GND connections if you are going to use ground fill.

4. Most of my LEDs/buttons/ etc. will be put on to leads and mounted on the front panel. Should I create dummy LEDs with jumper connections and alike, or just use the button/LED footprints as I am doing here and feed wires from them? That may actually help a bit with pinouts I suppose.

I don't know the right answer. You can always design a part that has a connector as a footprint. In case of leds it almost does not matter as if you use a small connector that fits exactly into dimensions of a led, but this might bite you back though if you don't account for the space needed for connector and as a result can't access connector locks for easy disconnecting.

[poorchava]

I would rotate Q1 90 deg clockwise and bring it closer to F1 (unless there are some mechanical parts in the way). Schematic looks very nice and clean.

Another huge mistake that you've made was choosing eagle. Switch to DipTrace while you still can.

[mariush]

1. Add a 100nF ceramic at the input.
2. I would add a p-channel mosfet as a sort of reverse voltage protection.  See youtube.com/watch?v=IrB-FPcv1Dc (copy paste in new tab)

3. 7805 is only capable or 1-1.5A. I see you wrote on silkscreen 5v 2A. Not gonna happen. LM317 can do 2A or *1085 (3-3.2A max, lm1085, ld1085, ams1085 and others)  or  *1084 (same, but 5a max)
4. If you plan on soldering on screwing the 7805 to the PCB consider the thermals  ... (7v - 5v ) x 1.5a = 2 x 1.5 = 3 watts.
It may stay cool enough if you solder the tab to the pcb and there's lots of vias to make the other side of the pcb as a heatsink as well. 
With more than 7v at input, you're screwed without an actual heatsink. You're better off just having the regulator stay a few mm above the board with a heatsink screwed to it and with some thermal paste.

5. I would actually turn the regulator 180 degrees or at least 90 degrees and keep the heat away from that 100uF electrolytic

6. depending on how you use this, it may be a good idea to add a diode as protection for the regulator, see page 11 and onwards in this datasheet for info about protection and heat dissipation: http://www.ti.com.cn/cn/lit/ds/symlink/lm340-n.pdf (it's lm340/7805 combined datasheet)

[stryker]

Just curious, would a high value pull-down resistor on the gate of Q1 be appropriate too?

[tautech]

With polarized components place the pin polarity symbol outside the component footprint so it can easily be seen when the board is populated. Always add this on either top overlay or bottom layer or even as a copper symbol. (+ - K etc) Square pads are fine, but when a board is populated and soldered the more info that is on the board the better.

Yes as others have said shift and rotate Q1.

Also give yourself the option of better heatsinking if needed, by placing the Vreg on the edge of the board.

There seems to be variation in some track clearances to the GND plane. WTF

Pad size mostly ok, but Q1, J1 & J2 all could be larger.
If you have to do repairs, a larger pad size is much less likely to lift as a result of any rework.

Otherwise tidy job :-)

[TriodeTiger]

Whew, I should write a change log... updated PCB (schematic is obvious )



Alright, change list from memory...

- 100nF added (good on both ends unlike before?)
- Q1 does reverse protection (It's position I got it in pleeeases me)
- Fixed trace size (Q2 didn't need beefy traces, also 32thou for good margin when with power)
- Stood regulator up and gave it less of a task, might put quiet fan there
- Electro: Added + to silkscreen also moved away from reg. back (should be far enough.)
- Moved copyright stuff to tStop (soldermask stop) as I originally desired
- Increased pad sizes on Q's and J's (whew, scared me with DRC errors, no more auto dia. size for me..)
- Shortened it a little, is now 2x1.2'', not quite the 2sqin-perfect I wanted for Lane's service but is pretty compact and single sided! I am proud!

I think that is all... but should be obvious heh.

Question & Feedback Corner..

There seems to be variation in some track clearances to the GND plane. WTF

Maybe an artefact of the resolution/scaling? I set the clearance rule or whatnot, I think it should be all consistent, the DRC checks clean anyhow.

Just curious, would a high value pull-down resistor on the gate of Q1 be appropriate too?

Right! Did not think of that, it is floating when fuse blown. Oops, well, I'll add that in soon.

Another huge mistake that you've made was choosing eagle. Switch to DipTrace while you still can.

Might, tried it when CADs were very confusing to me so it stuck in mind like such, I kinda like the aesthetics of Eagle and hacking pre-done packages if needed.. I only have so much time! Community nice too.. Element14 and all. I should switch only if it benefits me, right?

Otherwise tidy job :-)

I always appreciate the feedback. It was a huge step to get my feet wet in every aspect, and I enjoyed every bit of it. I take pride in making things complete as I know how 

edit: as for my first first question.. might just wing it with the silkscreen art and see, surely others have done that detailing before.

TriodeTiger.

[tautech]

Try and do your layouts with traces running the shortest distances possible and resist where possible running a track through a pad. Instead put it on a branch off that track. Change R1 for example.
Often you will need to mod pad size/shape to get clearances you are happy with.
J1 & 2 could be rectangular for example.

Your LED's have no polarity indicator except for the top overlay. If you chose to try DIY etching you should put a K of copper on the bottom layer.

If you do IC's, place a square/rectangular pad and/or a dot at pin 1.

Study old PCB's and pick faults to avoid and good points to use.

[poorchava]

When I do simple layout as this one, I just tend to choose such trace width between 2 pads, that it is equal to diameter/width of the smaller pad. I would space out components around regulator. It's gonna be warm at least which will have negative effect of electrolytic capacitor lifetime. If you foresee a possibility of large capacitors being connected across output rail, I'd use a diode parallel to the regulator, cathode to the regulator input. This is to prevent reverse current through the regulator resulting from capacitors on output rail discharging when power is turned off. A simple 1N5819 will do.

[mariush]

I'd say move that regulator a bit further to the right, just in case you'd want to use a heatsink like this one: http://uk.farnell.com/multicomp/mc33278/heatsink-to220-x-2-7-6-c-w/dp/1710623  which should dissipate 3-4 watts just fine and keep your regulator at about 60-80c. Though, I see you edited the silkscreen to say 5v @ 500mA in which case even a tinier heatsink will do. Oh, and be careful.. not sure what LDO you picked, but most need at least 1.1-1.3v above the output voltage to regulate, so 6v may be too low (you wrote that on silkscreen)

If you changed 7805 to something more obscure, read the datasheet because some regulators under some conditions require an output capacitor with some ESR (usually 22-47uF electrolytic or more).

I'd Flip R1 and R2  90 degrees,  align the ptc with C2 and C3 and have a straight trace from + to Q2, going through the PTC.
The 1k resistor footprints seem a bit big. Considering you work with 5v, 0.125w resistors will do, which are tiny (4mm long + leads, 2mm in diameter)

Otherwise, it looks OK I guess.

[miceuz]

...and now change resistors, transistor and ceramic caps to SMD! 

[free_electron]

check your capacitor footprints. they are way too small !
this is an annoyance in eagle. every pcb is see has these caps with 100 mil pin pitch.

[LukeW]

- Run a DRC in Eagle, for example using Laen's downloadable pre-baked DRU file for OSHPark.

- You'll probably get a heap of "Stop Mask" errors in Eagle where silkscreen text (say for example the TPlace or TNames layers) overlaps the solder mask apertures. Fixing most of these will require editing component libraries supplied with Eagle, there are loads of these errors in the supplied libraries.

- IMO it would look neater if the input and output connectors were flipped around with positive on the right. This would give a neat track straight from the PTC to the output.

- If you want to make a homebrew DIY single-sided PCB you want all the copper tracks to be on the bottom (blue) layer, not the top. If all the connections are on the top layer, on a single-sided board you'll need to squeeze your soldering iron in underneath all components (such as the LEDs and electrolytic cap) and raise them up off the board to get clearance to solder them onto the top-layer pads. However, this is not a big deal if you intend to use a professional PCB fab house with pads on both sides and through-hole plating on all holes.

- Do you want all the names and values, such as 1k R2, on your silkscreen? If not you can turn off what layers are mapped onto GTO, such as the TNames and TValues layer, during CAM processing and Gerber export.
If you do decide you want them on the silkscreen, use the "smash" tool, and move them to an appropriate place where they're not overlapping other silkscreen or under components where they cannot be read after assembly, change the "ratio" of these silkscreen text items to at least 15 for good printability, and change the size to at least 30.

[Hideki]

Change the color of the tDocu layer (or turn it off). Right now it looks exactly like the silkscreen, so how will you know if you overlap something you shouldn't? The arcs inside the LEDs for example.

As LukeW said, the Eagle libraries are full of errors where the silkscreen is drawn on top of the pads or solder mask holes. Yes, most PCB manufacturers will clip away the overlap, but you really shouldn't design it that way in the first place.

Since this is all through-hole, definitely put the tracks on the bottom layer.

[theatrus]

- You'll probably get a heap of "Stop Mask" errors in Eagle where silkscreen text (say for example the TPlace or TNames layers) overlaps the solder mask apertures. Fixing most of these will require editing component libraries supplied with Eagle, there are loads of these errors in the supplied libraries.

You can actually just use the "smash" tool (I'm sure thats a bad German translation which stuck) which will allow you to move all the designators around.

Back when I used Eagle for big boards, you'd inevitably smash everything.

[LukeW]

That's true for names and values, but you usually get heaps of Stop Mask errors on the tPlace layer in the actual component outline drawing if you're using Eagle-supplied stock libraries, and you have to either edit the libraries to fix it, make your own libraries, or just ignore it and accept that you'll cut off the silkscreen markings overlapping the mask apertures (this can involve a couple of days waiting for the email turn around cycle with the PCB fab to say yes, we know, just ignore it.)

[kizzap]

Mounting holes? Small thing, but could cause issues down the track...

I would rotate the regulator 90° clockwise, and utilise some of that extra space for mounting a heatsink, /or/ bring that regulator to the board edge so you can hang a heatsink off the side.

[free_electron]

2 ampere ptc ? Behind a 7805 ? That'll never work...

[Bloch]

Quote from: free_electron on Today at 01:13:02 AM2 ampere ptc ? Behind a 7805 ? That'll never work...

He may be using a 78S05

I would move the fuse to the other side of the 7805

[TriodeTiger]

Whew! OSHPark probably might get my board back late June, but I thought I would share what I sent. I thought I may as well not keep improving my project until I can actually see what it will look like - if the silkscreen would work, if the parts will fit right.

Anyhow, here's what I have with the top fill hidden:

Whole thing is roughly 3x1.5'' which is disconcerting, looks squashed on my low DPI monitor but I'm sure It'll look good in hand and the logo is at least the recommended 200 DPI and Laen's DRC checks out fine and everything, also fixed some of the retarded Eagle footprints although I'll replace those with someone's replacement library I remember who fixes that.

I really like the test points, suppose I haven't a major need to use spring clips or anything fancy for now but it helps and adds a bit of a finished touch to the test. The MC7805CTG is what I chose, LDO, 1A maximum with a clip on TO220 heatsink which should be fine with the ~50-200mA I intend to use it at in the end with margin. I may just drop in a switching module, the LM2574N-5G looks like ~$2 and can do 4.5-30V or something which is quite nice.

I made the mistake of finding there weren't BSS92* transistors, and the layout is GSD instead of SGD, so I'll have to bodge the replacement ZVP4105A in but it should be good and that's what the test is for, I found all the other parts, including 100uF 0.5mm diameter capacitors for cheap!**

*At least on Newark, is it archaic? The BSS- are popular in EU and the 2Nxxxx here? I'm not sure, the -92 seems like a very common transistor, but nonexistent in stock..

**

check your capacitor footprints. they are way too small !
this is an annoyance in eagle. every pcb is see has these caps with 100 mil pin pitch.

Well now - I shall update when I get it, and also correct some of the silly things such as mounting holes (probably will mount to the back wall of the project box though) and other essentials I just remembered and just forgot.

Look acceptable for my $20 sent to Laen for 3? It's gotta be worth that in pretty purple solder mask and silkscreen alone, IMHO.

Tiger.

[Refrigerator]

The clearance between the two 100nF ( C3 ) red traces is ridiculously small. 

[TriodeTiger]

*drumroll*, here's the three I got in my OSHPark order (see attachments)

Observations...

A) Q1 (ZVP4105), the reverse protection pmos (S to + port, G to - port, D to regulator) is rated for only -175mA or so and it seems it gets red hot and clamps the voltage down to 2V or so which does not let me trip the 850mA fuse.

This kinda makes a mosfet for anything but low level circuits kinda useless as a polarity protection, no? These were maybe a dollar a piece, any power ones must be more. I may opt for a schottky..

B) The silkscreen was messed up on two of them, Q1's marker on one which isn't very noticeable, but in the picture of the three the one on the bottom right was quite mangled. It's definitely not the picture pixelating. I suppose you get what you pay for, maybe mine was at an end and mishandled more. Maybe I should ask them if boards come back like that often though.

C) The fuse once tripped with a short limits the current to just about 350mA, half that at a higher input voltage (~9V), which I guess is not too bad. It was only a 'make the first thing I can think of' kinda test for OSHPark and I learned a lot

D) It appears the ERC checked out fine even though I goofed and didn't end up connecting the VCC test pad in to the centre of C3's pad, and so the test pad links to nothing. Kinda odd, as if Eagle thought the keepout was electrically connected to the pad, or something.

The copyright/name in gold on the bottom right appear very shiny and I am happy with them, but the two-pin female headers have extremely small and thin leads ... it was really strange and awkward to search for them on Newark/E14 actually.. I can't even find what say Sparkfun would recommend, since it links to a Mouser page or something and I can't seem to find where they are on E14.

To whoever said the capacitor footprints were too small, one of them's a 100uF and very inexpensive! I quite like their size and they are from this side of the pond.

The clearance between the two 100nF ( C3 ) red traces is ridiculously small. 

Appears nicely isolated on the actual board, I've seen much higher voltages in thinner traces I suppose.

[LukeW]

Couldn't the top-layer track from the Vcc pad just go straight up to the top of the PTC fuse?

[TriodeTiger]

Couldn't the top-layer track from the Vcc pad just go straight up to the top of the PTC fuse?

I couldn't resist the two looking like a pair going to the capacitors 

[homebrew]

Hm, this thread is interesting, because basically the end result is worse than it was at the beginning ... strange 

1) No protection diode for reverse current over the 78X05 -> could kill the 7805 when the supply is switched off.

2) You should always route a power trace to the capacitor and then from the capacitor to something else. Your capacitor is connected in a "T"-shape which includes inductance and resistance within the trace hampering the capacitor's capability to smoothen the supply.

3) The small 100nF caps could be closer to the regulator as they are not so heat sensitive as the electrolytic ones. I would use 0805 SMD directly besides the pad.

4) Forget on the ground plane! This ground plane won't do any good. Especially because you can not control the return paths. Thus the regulation capabilities of the 7805 get even worse. Use a star topology instead ...

This is how I would do it ...