Am I misunderstanding what an analogue switch does, eg 4066.

[supernovah]

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[Richard Crowley]

Suggest studying the data sheets to see how your tests should be conducted. In particular, note the source and load impedances used for valid tests.

Will you see some control signal leakage at the input and/or output node?  Sure, if you are looking at without any termination.  But that is not a "real-world" configuration, so the results of the test reveal nothing useful.

[Richard Crowley]

You are looking at those nodes/pins at a very high impedance. Perhaps 1M or more depending on your probe and scope (not revealed).
That IS NOT a valid test!  You will never use a 4066 in such a high impedance circuit.  Those tests mean nothing in the Real World.
If you have your input and output nodes/pins terminated at 10K or so to ground, do your measurements again and get back to us.  Otherwise, your measurements seem to have no Real World significance.

Repeating:  Will you see leakage from the control node into the input and/or output nodes?  Sure, if they are floating at high impedance.  That is normal and expected.  It is also not a Real World condition and has no implication on how it is used in the Real World.

A solid-state quad bilateral switch is NOT a hard metalic contact relay.  It is a very complex solid state composite circuit which cannot even be shown as equivalent conventional discreet components.  Those equivalent circuits are only "logical equivalents".  All solid-state devices from diodes and simple junction transistors to the most sophisticated IC are very complex devices that will never behave in a perfect theoretical model.

However, your "test circuit" is almost a "sample and hold" type of application, and note that the 4066 data sheet says:

The advantages over single-channel switches include peak input-signal voltage swings equal to the full supply voltage and more constant on-state impedance over the input-signal range. However, for sample-and-hold applications, the CD4016B device is recommended.

[Ian.M]

Its 4000 series CMOS which generally has logic thresholds of 20% Vcc for Vil and 80% Vcc for Vih (unless the specific datasheet states other thresholds).  If you are using +/- 7.5V supplies that means you need the switch enable pins to swing from below -4.5V to above +4.5V to ensure correct operation.   Leaving CMOS inputs floating is forbidden, so add 10K pulldowns to the -7.5V rail (to hold the associated switch off) on all enable inputs if they aren't permanently connected to a push-pull drive circuit.

The current source maximum voltage *MUST* *NOT* exceed the 4066 supply rails. 
What current and what value capacitor were you using?  Some nonlinearity is to be expected at higher currents due to the variation of On resistance with channel voltage, and at lower currents, gate charge injection is likely to be significant.