I have a few other design rules which I've found helpful:
When designing symbols for ICs, I normally separate them out into signal pins and power pins, on two different parts of the symbol. The power symbols and the associated decouplers are kept on another page, so the signal flow isn't cluttered with power pins and capacitors.
Every IC has every pin shown on the symbol, always. No hidden pins, for any reason, ever. No bus pins either.
Power supply rails are always labelled with their actual voltage, and never 'VCC' or similar. A net called +3V3 is unambiguous, but a net called VCC could be 5V, or 3.3V, or 1.25V, or anything else. Using the specific voltage reduces the chance of accidentally connecting dissimiliar supply rails together. (Exception: supply rails whose voltage is not fixed may be called by something else provided it's unambiguous, eg. VDD_CORE).
The addition of helpful comments about how the design works, and why specific components or circuits are used, IS permitted!
The use of hierarchy is generally NOT encouraged, unless there are multiple, identical instances of a specific block. It's much easier to follow a signal from page A to page B than it is to follow it from page A, up a level to page 0, and then back down to page B where it appears under a slightly different name. If you need a block diagram, then draw a block diagram... don't try and force the schematic into a structure that gives you one "for free".
Where hierarchy is used, each signal must have exactly one identical, unique name across the whole schematic. So, for example, a signal called CPU_CLK on one page mustn't end up getting called CLK_CPU or CPUCLK_33M elsewhere.