I use 4 layer a lot for high precision analog, and find it invaluable. Typically, I use the outer layers for routing and ground copper pours. I use the inner layers for + and - power using copper pours, with some routing in these layers, as long as it doesn't slice up the foil too much. I don't often use controlled impedance traces, so I don't need to route over a clean plane, but your circuits may be different. Still, I have successfully laid out a 420MHz current feedback amplifier with some inner layer copper cuts and special keepaway distances for sensitive nodes, and the layout was stable the first time. So, you can do high speed work without a 'perfect' plane as long as you're careful about things.
Some of the things to keep in mind for low cost 4 layer are that you have to use vias that go all the way through the PCB for lowest cost. Blind or buried vias would be great, but they're too pricey for me. The clearances on the inner layers are typically larger than for the outer layers, so make sure that you set your DRC parameters for this. I'm using a 7 mil outer layer clearance with a 10 mil inner layer clearance. The inner layer clearance can be set by changing the isolate parameter of the polygon used for the pour on that layer - there's no explicit place in Eagle's DRC rules to set this, but using 7 mil in the clearances section and then using 10 mil in the polygon settings, you can get this to work.
I use a 10 mil minimum drill size for low cost, but I often use 15 or 20 mil drills so that they are slightly lower impedance, and are more reliable. The 62 mil stackup is tall compared to a 10 mil drill, so if you don't need a tiny via, why push the fab process that much. But, these larger drills, along with their restring size and clearance, are not able to route 0.5 mm pitch logic, so you sometimes absolutely need a 10 mil drill to handle an 0.5mm pitch SMD part with a logic bus.
Overall, the most important thing is to get your Eagle DRC parameters set well, and use design rule check often. It's silly to push the limits all the time, but the 7 mil outer space/trace, 10 mil inner clearance, 7 mil restring, 10 mil minimum drill, and 20 mil copper/dimension clearance seems to work well for Advanced Circuits lower cost process.
Best of luck!