Various strategies for polygon pours on professional PCBs - why and when ?

[Warhawk]

Hello Everyone,
I've already done quite a few small and mid-size PCBs for my hobby projects and internal prototypes, but I don't do PCB design for living. I mainly deal with embedded and mixed-signal boards (no RF, no precision analog). Thus, I am far away for being an expert :-)
I am wondering if someone can help me with understanding copper pours design strategies for high performance equipment (lab, medical, industry, 2-6 layers).

Finally the question:
I've seen that there are practically three different strategies for distributing power (mostly COM-GND) on PCBs. I am wondering why and when to use it ?

Type one:
- Usually 4-layer PCB with two internal power planes. One is for positive voltage rail(s) while the second one is common ground. Top and bottom layers do not have practically other than signal traces.
Example:

https://www.eevblog.com/2014/03/16/eevblog-591-agilent-54622d-retro-mixed-signal-osciloscope-review-teardown/

Type two:
- Multilayer board, where some voltage rails and grounds are also on top and bottom. Internal layers are mixed (planes + traces). Surprisingly, there could have been way more copper (e.g. shielding) but there is not. Typical example is a computer motherboard.

Others:
https://specforge.com/static/images/demo/2_Display_PCB_555.jpg
http://bardagjy.com/wp-content/gallery/gds-820c/2011-07-08-18-42-17.jpg
https://sc01.alicdn.com/kf/HTB1vtJmFVXXXXbPapXXq6xXFXXXC/206167058/HTB1vtJmFVXXXXbPapXXq6xXFXXXC.jpg
etc.

Type three:
- Top and bottom layer (plus internal layers) have a copper pour surrounding all parts (practically copies the board outline) with minimum spacing. Even under BGAs. Copper areas are connected using via stitching technique.

Others:
http://electronics360.globalspec.com/article/3330/bosch-dcu17hd01-4-41-engine-control-module-teardown

Even in my previous organization dealing with various electronics for industry and railway, there were two groups of engineers and professional PCB layouters with quite opposite opinions.

I don't expect a black-and-white answer but I better look forward interesting discussion.

Thank you in Advance to everyone contributing on this topic 

[mikeselectricstuff]

There are all sorts of reasons and issues.
For high volume, etching copper costs money, so you want to leave as much on as possible.
You ideally want to balance the amount of copper between sides for thermal reasons to reduce warping during reflow.
You ideally want to have uniform copper density across the board for the plating process.
Adding more copper to planes ( e.g. duplicating surface & inner) costs almost nothing and will reduce impedance. This might allow the use of thinner copper (for cost, or to allow thinner traces. Surface planes may also reduce the need for vias ( cost/space), and provide better thermal performance.   
Putting power/ground on the outside and signals inside helps sheilding, and can also have advantages in use of surface area to maximise vias etc.

But also a lot may simply be down to style/preference that makes little difference in practice.

[tszaboo]

Some reading:
http://www.hottconsultants.com/techtips/pcb-stack-up-2.html
I usually stick to the conventional stack up, and add some pours or hatched pours to the top bottom to fill large empty areas (AKA dance floors) to balance copper somewhat evenly.

[pix3l]

I always like to try to keep all components on the top of the PCB. In that case it's very easy to route on the top layer and not to have a plane on this layer. For a 4-layer PCB it's then nice to have one layer completely for GND and one layer for your supply voltage (might be divided in smaller copper pours if you have multiple supply voltages) and then you have one more layer which you can use for routing.

But of course it's totally dependent on what kind of signals you're routing (digital signals at lower frequencies are usually almost not sensitive to how you route them).

[PCB.Wiz]

Surprisingly, there could have been way more copper (e.g. shielding) but there is not. Typical example is a computer motherboard.

More copper also means more capacitance, which can slow things down.

Type three:
- Top and bottom layer (plus internal layers) have a copper pour surrounding all parts (practically copies the board outline) with minimum spacing.

There is also a
Type four
 Via-in-Pad designs, where there are almost no outer layer traces, and maximal copper

This of course costs more layers, but it can give very quiet and very compact PCBs.

[T3sl4co1l]

Surprisingly, there could have been way more copper (e.g. shielding) but there is not. Typical example is a computer motherboard.

More copper also means more capacitance, which can slow things down.

No, the velocity of propagation doesn't vary with the amount of copper.  (It is somewhat higher for outer layers, because half the dielectric is air.)

If your signals are very high impedance compared to the trace impedance, you will lose a proportional amount of the rising edge, or in any case, the equivalent capacitance is high relative to the node impedance, causing HF attenuation.

Medium to high speed digital signals are largely made to drive 50-100 ohm transmission lines, so this isn't a problem for digital.  It is a concern for analog that may have oddball circuit impedances and high bandwidth or precision.

Tim

[DerekG]

I am wondering if someone can help me with understanding copper pours design strategies

If you have a lot of digital signals, you will probably have more earth points than any other single class of net.

If this is the case, then (at least on 2 layer boards) flooding the bottom layer with copper & connecting that to the "earth/ground" net, will often speed up routing considerably.

I often "hide" the earth/gnd net, route everything else, then flood the bottom layer, connecting that bottom copper flood to the earth/gnd net. Often, some 90% of all the earth points are now connected, leaving me (or the autorouter) to complete just the last 10%.

[salbayeng]

You didn't mention the old chestnut of hatching vs solid fill.
Basically every trip through the reflow oven generates some gas in the fibreglass under the copper.
Hatch fills allow the gas to dissipate, solid fills make blisters and will rip out vias and generally create havoc.

So if you have components on both sides, and need two trips through the oven and are not using leadfree and not using cheap PCB's then you can usually get away with solid fills.
Lead free with two oven cycles is pushing your luck. If you need to rework those boards with another oven pass then you see blistering with solid fills unless you have top quality materials. Tracks wider than 100mils can blister too. 

If you are prototyping with cheap PCB's, and your reflow is a bit uncontrolled then you really need to use hatch fills, and leaded solder.