Rigol MSO4000 and DS4000. Tests, bugs, firmware, questions, etc...

[pascal_sweden]

Really nice "Pimp Your Scope" knobs!

[voltsandjolts]

Here's my silly "upgrade" to my MSO4014, inspired by another thread...

 

I think there is an Agilent MSOX at your work which now has Rigol knobs on it! 

[Andrew8086]

After playing with lots of license keys I would like to run a 'factory reset' to clear all the key leftovers.

I'm followingg the instructions provided by RIGOL:

1) Power cycle the instrument
2) During the boot sequence, quickly and repeatedly press the 6th grey colored
button located in the quick measurements area on the left side of the instrument ...

Sadly I seem not to be able to perform said factory reset, whatever I do the scope always boots normally.

Could someone who accomplished this task provide some timing instructions, e.g.

- after pressing the power button when to start mashing the key #6
- what key #6 'press frequency' is required
- how long after switching on (i.e. during the boot sequnce) does one have to mash the key
- is there an indication that the reset command has been accepted so you don't have to wait for the scope to completely boot

Any hints and tricks and help highly appreciated!

[Sal Ammoniac]

Thank you for the closeup picture of the FPGA. Looks like they are using the larger FFG676 package with more IO.

So it would be this one for $287.50 each
http://www.digikey.com/product-detail/en/xilinx-inc/XC5VLX30-1FFG676C/122-1559-ND/1768319

At DesignCon about two years ago the Rigol rep told me that the company was hard at work designing ASICs to replace the FPGAs in many of their scopes. If this is true, then there would be a considerable cost savings over using several Virtex-5 FPGAs in each scope.

Anyone know if any of the more recent models have gone from FPGAs to ASICs yet?

[alank2]

Andrew - a reset using the front panel keys only resets the current configuration stored in FRAM.  To remove keys you have to use the SCPI command to uninstall them.  Do some searching for scpi uninstall here and you should be able to find it.

[Andrew8086]

Andrew - a reset using the front panel keys only resets the current configuration stored in FRAM.  To remove keys you have to use the SCPI command to uninstall them.  Do some searching for scpi uninstall here and you should be able to find it.

Yes, thank you - no problem with license installing / uninstalling via SCPI commands + Telnet. Actually, after testing lots of keys I'd just like to do some housekeeping, a factory reset seems to clean up some internal history buffer stuff: 

I got curious so I tried all the codes for the second position (Rx39), below are the results. Also noticed in the key entry options setup page that the 0, 1, I, and O keys are missing, so I wasn't able to test those combinations. Another interesting thing I found was that after I entered in 32 keys the system wouldn't let me enter in anymore, when I pressed the apply button noting happened. I tried uninstalling the keys but that still wouldn't let me enter more keys, I ended up having to do a factory reset before it would start accepting more keys.

So, from someone who's been there before: Any (timing, sequence, whatever) tips on how to get the scope to accept the reset? I think I'm beginning to wear down this #6 key with my futile attempts.
 

[jjoonathan]

DS4000-related repair story here: https://www.eevblog.com/forum/repair/rigol-ds4000-rail-to-rail-noise-repaired/

I guess it's confirmed, the ADCs are ADC08D1000 clones... with one minor, err, "enhancement" 

[NorthGuy]

The Emona site shows a 18.5% (2779/3410) difference in price between DS4014 and DS4014E ...

I don't know why anyone would choose the E model for 18% ...

Perhaps DS4014E has the same hardware as DS4014 (extra memory and 4Gs/s sample rate removed in software) and can be re-flashed with DS4014 firmware. Then 18% off looks like a good deal.

[jjoonathan]

I wouldn't bet on it. The DS4000 uses expensive chips, and halving sample rate + waveform rate could save them significant BOM cost. My money would be on finding the same board and layout in the DS4000E but with two ADCs and two Virtex 5s missing.

DS4000:
4x ADC08D1000 (2GS*4 or 4GS*2): $1360 on mouser, $800 on taobao
5x XC5VLX30-1FFG324C: $1300 on digikey

[NorthGuy]

I wouldn't bet on it. The DS4000 uses expensive chips, and halving sample rate + waveform rate could save them significant BOM cost. My money would be on finding the same board and layout in the DS4000E but with two ADCs and two Virtex 5s missing.

DS4000:
4x ADC08D1000 (2GS*4 or 4GS*2): $1360 on mouser, $800 on taobao
5x XC5VLX30-1FFG324C: $1300 on digikey

You still need 4 ADCs (2GS*4) for DS4000E and probably you cannot remove FPGAs without major firmware rework.

Based on what people find in their scopes, Rigol prints lots of boards which are all the same (e.g. LA components are found in DS (not only MSO) models, all models have the same front ends even though the bandwidth is different etc.). This way they don't need to predict which model will sell better, minimize waste and reduce repair costs.

[jjoonathan]

Wow, looks like you're right, it *is* fully 2GS*4. Well... in that case, I can't wait to see a 4000E teardown 

[NorthGuy]

On the other hand, if you figure the price of probes (by Rigol's list prices), DS4014E is actually more expensive than DS4014.

[alank2]

I ended up selling the four RP3500A probes that came with my DS4014 for around $100 each, reducing the cost of my DS4014 by $400.  I didn't like the readout pin that scratches the crap out of the scope anyway.

[Trev4G]

I ended up selling the four RP3500A probes that came with my DS4014 for around $100 each, reducing the cost of my DS4014 by $400.  I didn't like the readout pin that scratches the crap out of the scope anyway.

Wow $100 each! I always thought the price was set to make it look as though you were getting a valuable freebie with a scope. They are a very basic probe and in the case of mine poorly made.

In the body at the scope end the co-ax centre core is terminated in a soldered joint. But in mine the instead of trimming the wire at the joint a length trailed into the body of the probe. Result all my probes failed when the wire shorted on earthed metal. While it was easy to repair once I found the problem it shouldn't happen on an economy probe let alone an overpriced one!

[alank2]

I should mention it took over a year to sell them all, but eventually they did all sell.

[pascal_sweden]

Can the Rigol MSO4014 be upgraded to a Rigol MSO4054 without opening up the scope? (Riglol method)

Or does one have to open up the scope and do a memory dump with JTAG, as is required with the
MSO1000Z? (Rigol Bildschirmkopie method)

Which of both tools works on the MSO4000 series? Riglol without opening up the scope or Bildschirmkopie with opening up the scope?

[jjoonathan]

Riglol still works without opening the scope, at least for the DS/MSO4000 series. I don't know that we have confirmation for the -E models.

[pascal_sweden]

What type of activities are done in hardware in the DS/MSO4000 series?

Is it only the Waveform rendering on the screen and the Pass-Fail mask testing?

Obviously serial protocol decoding is done in software, based on the videos on YouTube.
I assume the same counts for the triggering in the logic analyzer.

Why doesn't Rigol synthesize their C code with the serial protocol decoding routines into the FPGA hardware through High-Level Synthesis tools? This certainly is not rocket science, and there probably is plenty of space left in the beefy FPGA.

[jjoonathan]

Mask testing is done in SW too, unfortunately. They've got a surprisingly nice UI for doing it on segmented memory, but still, SW.

Why not HW decodes+mask+etc? Because it would take significant investment when they've already stopped development and written off the DS4000 and DS6000 series years ago. They keep them around to get rid of old stock and maintain credibility ("time-tested expertise in the 500MHz and 1GHz brackets" or somesuch), maybe get a few bucks from the local defense market, but they're clearly focusing their dev resources on the next generation. Whether that means ASICs (per the DesignCon rumors), mobile GPUs for dirt cheap number crunching, or both, I don't know, but they saw the writing on the wall for the "COTS FPGA + COTS ADC" architecture and reacted appropriately. Good on them! Can't wait to see what comes out next

EDIT: or maybe the next step is Zync, like we see in GW instek. All this about Rigol's future plans is pure speculation. What's not speculation is the fact that DS4k and DS6k are old designs which have been treated like evolutionary dead ends for years.

[pascal_sweden]

Maybe we will see a new product announcement soon! Exciting times!

[NorthGuy]

What type of activities are done in hardware in the DS/MSO4000 series?

I assume the same counts for the triggering in the logic analyzer.

I think triggering is analog and is done in hardware. They have huge ASICs on the front end and they manage to produce "trigger out" almost immediately after the trigger occurs.

[TurboTom]

I think triggering is analog and is done in hardware. They have huge ASICs on the front end and they manage to produce "trigger out" almost immediately after the trigger occurs.

And may I add that there's virtually no jitter in the 27ns Trigger event -> Trig Out delay. For a comparison of some Rigol Scopes regarding this subject, you may like to have a look here: https://www.eevblog.com/forum/testgear/new-rigol-ds1054z-oscilloscope/msg1068070/#msg1068070

All this is a strong indication for a hardware trigger. It's quite interesting that even the more complex trigger schemes have a similarly short propagation delay to trigger out with the same small jitter. Actually, I'm quite amazed about the performance of the '4000 series regarding this detail.

Cheers,
Thomas

[jjoonathan]

I can confirm that the trigger circuit is analog: no jitter between it and the triggering signal and it works up to 1.1GHz on a 500MHz (nameplate 100MHz) scope. Not bad!

OTOH the trigger doesn't always work on low amplitude signals and instead of using a TDC for sub-clock trigger alignment Rigol has chosen to perform a secondary digital trigger to align the waveform on the X axis. This wouldn't be so bad if they did it 100% of the time, but they don't perform the secondary alignment step when you're scrolling the trigger delay, so at low ns/div settings the waveform hops left and right by ~2ns every time you touch the knob. Yuck. Probably my #1 remaining pet peeve with the instrument.

[pascal_sweden]

I meant triggering in the logic analyzer on a pattern. Pattern triggering in the LA must be done in software, as it creates more flexibility. Or would they really cover all these combinations in hardware?

[TurboTom]

I meant triggering in the logic analyzer on a pattern. Pattern triggering in the LA must be done in software, as it creates more flexibility. Or would they really cover all these combinations in hardware?

Well, I just performed a qick-and-dirty test with my MSO4014(+) as follows: Square wave signal from generator fed to D0 of the digital (MSO) inputs. At the connection point of the digital probe, I attached a standard probe of cannel1 of a DS2072A(+). Channel2 probe of this scope was connected to the Trig Out of the MSO4014. So the delay of the measurement system should be compensated fairly well. The (measured) trigger delay would just consist of the delay of the digital (MSO) probe assembly and the internal trigger processing time of the scope.

What I found: Rising edge trigger on MSO channel D0: 45.5ns with no observable jitter
Pattern trigger on 8-bit word D0~D7: 41.8 ~ 49.2ns, depending on trigger configuration of relevant line (D0) (Level H slowest, falling edge fastest) and again no observable jitter at each of the configurations.

I guess this pretty much indicates that the pattern trigger is done in hardware as well, considering that the delay also includes several nanoseconds propagation delay of the digital probe assembly (about 80cm long, unknown impedance coax wire).

I hope this answers your question 

Cheers,
Thomas