good question. we too are European but Verilog is indeed a pre-requisite because we want to go with an ICE40 UP5K and then the route of the open source toolchain Yosys / Arachne-pnr / Icestorm (or using as fallback IceCube2 - Radiant looks a bit "early"..) to get the most control about this development.
it's not a high performance solution involved, so thos path should be feasible IMHO, always open anyway to hear about "issues".
OTOH Vhdl and Verilog are not that far each other (if you stick with the "more standard" language constructs and HW principle to be more "portable" across vendor toolchain), maybe i can send you the RFP anyway, for you to give me a more focused feedback. if you already have working experience on digital audio HDL design, you are quite qualified in my point of view. for the "syntax" we can always find a workaround!