Altium 10 to 17 translation problems?

[tnpshow]

Hi All,
Long time lurker, first time poster here!

We're having some issues with a PCB supplier where we submitted an Altium v10 4-layer PCBDoc to be manufactured.
The manufacturer panelised it into a 2-up panel and had them made. I know for a fact that they panelised it in the PCB editor and then exported Gerbers as a panel.

We got the boards in and they didn't work. Internal plane 3 (which includes several split planes) is totally disconnected and all of the split plane nets were lost. There were also small parts of the polygons on the top and bottom layers missing, particularly where thermal reliefs on pads were supposed to be.

The manufacturer is blaming us for using Altium 10 (they are using 17 to panelise etc), stating that it is infamous for such behaviour?
Funny, because I've never had an issue in the past?

Can someone shed some light on newer versions of Altium please? Has something to do with copying/pasing designs in the same PCBDoc changed since 10?
I know that if you copy and paste a PCB in 10, even with 'Keep net name' and 'Duplicate Designators' checked, the power plane info is lost. I've always treated this as a no-no and used the 'Embedded Board Array' for such tasks.

Is this perhaps where they are going wrong?

I refuse to believe that it is simply a version translation error like they are trying to pass it off as.

Thanks in advance and sorry for the lengthy first post! 

TC

[Smallsmt]

I think he copied the PCB to panelize and that will cause this problem.
Use the build in panelize function to load PCB by reference and everything will work.

But it's much better to use processed files for PCB production send Gerber files and not the pcb design files!

[mrpackethead]

Strange that a pcb house would actually take your altium files.. I guess a few try to add value by doing so..  But this is really a bad idea, for exactly these kind of reasons that things go wrong.. I woud'nt even contemplate doing this if they had A17 and i had A17... There is just too much to go wrong..  At the very least you shoudl get them to send you the gerber files that they\produced before approvig production.

panelising is not that hard. the specifics of what you need to do though are related to how its going to be processed. For our PNP line it makes a huge differnece if we put tooling strips on it, with locating pin holes in the right place.

As for whats happening.. its a bit hard to guess....

[tnpshow]

Sorry guys, I didn't make myself clear. It's our assembly house that I'm dealing with.
They panelise it into their own custom panel and generate Gerbers from there.

I certainly agree that that generating the gerbers myself and sending them is the way ot go. I send the Altium file so that they can do the PnP and assembly directives etc.

From the gerbers I've seen back (since we discovered the problem), it looks like the two identical boards have been copied and pasted into the same PCBDoc. A rookie mistake!

The frustrating part is they are blaming us for 'old' Altium format, which is, insulting to say the least.

Thanks!

[mrpackethead]

why do they need to generate a 'custom' panel?    Why dont' you just get them to tell you what they need and do it for yourself. Will save you both time and money.
All these kind of fustrations have gone away for me, since i bought assmebly back in house.    there is no loss of information in hand-over.

>From the gerbers I've seen back (since we discovered the problem), it looks like the two identical boards have been copied and pasted into the same PCBDoc. A rookie mistake!

Well, then they can just make you another board.

[DigitalDeath]

...For our PNP line it makes a huge difference if we put tooling strips on it, with locating pin holes in the right place.

Do you happen to have a picture of what you're referring to in this sentence? Sounds interesting and important to learn.

[julianhigginson]

Wow. A standoff like that certainly makes an Altium subscription seem like a bargain.

If they just copied/pasted a second copy of the entire PCB design into itself or 2 copies into a fresh PCB file, then yeah they will have all sorts of problems with plane layers (if you used them!) or any polygons that got repoured. If they used the PCB array feature in a new PCB file, this really shouldn't be a problem.

You'd think that if they do this a lot (being a PCB fab or at least a PCB fab agent) they would know how to do this right?

Anyway - I'd suggest the next step is you demand to get a copy of their production PCB file. If you have problems looking at it, I can look at it for you or even with you if you want (I have AD17 and am based in Sydney if you can/want to bring it in person)..



As a side note: I often don't pannelise boards myself,  but I *always* ship gerbers for fabrication. Recommend you do this too from now on... Gerbers are a proper CAM file format, and once you've printed them, and released them with a fab document they are set in stone (as long as nobody tries to be smart and pisses abut with different combinations of layers from different release versions of the design) Then all they have to do is step and copy your verified release to suit their process and equipment... Where as you've seen with the AD PCB file format, it's a design file... And depending on what you do in AD, you can get wildly varying results.

As for any other manufacturing files - again you should be setting them in stone (to their specs if required) and releasing them as versioned objects.... Engaging a manufacturer requires back and forth dialogue for things like this. If they can't/won't speak with you to get the right files right from you, then I suggest you'd be better off with someone else.