Silkscreened Pads

[dangrie]

Hi all,

I was just cracking open a cheap USB current meter and found something I can't really explain. The main micro in a TQFP package has several pins covered in soldermask AND silkscreen (see attachment). Is there any reason why one would do that instead of just leaving out these pins on the solder stencil and/or just solder them to pads that aren't connected to any net?

I always solder n/c pins to unconnected pads just for the sake of the added mechanical stability. The only possible reason I can think of why they are not just left out from the solder paste stencil is to make sure they are also not connected when wave soldering or to make sure these pads don't "thieve" the solder from the surrounding pads, but this leaves the question of why not soldering them in the first place and the only explanation I can think of for this would be cost, but can this really be a reason? I think we're talking femto-cents/unit here

Also: Why silkscreening instead of just solder-masking the pads? Visual indication of which pads are unconnected?

Thanks for any insights
Daniel

Edit: I just noticed that there are actually traces going under / to these pads. In case they go under these pads it may be to make space to easily route these traces?

[Pinkus]

As you can see, there are traces running under some of these pins.
Thus I suppose, they are using solder mask and silk screen as a kind of double isolation between these traces and the pins.

[forrestc]

Edit: I just noticed that there are actually traces going under / to these pads. In case they go under these pads it may be to make space to easily route these traces?

I think that this is probably the reason.   There's a lot of this type of stuff done (although I haven't seen this particular method before) to make things fit on a too-crowded layout and still keep a double sided layout, since 4 layer boards can be rather expensive.   If the choice is between doing this and going to a 4 layer board or not fitting in the form factor, I can see why someone would choose this method..   I suspect the purpose of both the solder mask and silk screen is to give a double layer of insulation just in case.

I will say I wouldn't be likely to do this in a design though....  since I'm not sure I'd trust the silkscreen+solder mask to be good enough insulation.

[d1wang]

The soldering is not symmetric. Won't the solder paste pull the component upward and cause shorts?

[ar__systems]

Why guess, when you can look up the datasheets for the parts? Most likely some address or range or mode setting pins...

[d1wang]

If anyone wants to bother looking, the product page is at http://www.i-core.cn/proshow.aspx?cateid=62&productsid=97

You have to send a request to get spec sheet. The entire site is in Simplified Chinese, so expect all communication and datasheet to be in Chinese.

[Kasper]

Never seen this before but I'm guessing others are right, it is for insulation. It might also be to make it clear to the manufacturers so they don't put it on hold while checking.

I recently had a build put on hold because PCA thought I had mistake in PCB. An IMU had an exposed pad on bottom so PCA thought there should be a pad on PCB to solder it to but datasheet said otherwise.

[Siwastaja]

Never seen this on other's products, but I've been doing exactly this; funny to see I'm not the only one coming up with the idea. The reasoning is, there often are pins that end up non-connected. By removing the pad, this space is usable for signal or power routing, or improved ground plane connection (relevant on 2-layer design). Adding the silkscreen should reduce the risk of penetration of soldermask due to vibration scrubbing off the mask slowly; the pins could have sharp edges. I have done this on a QFN as well, although I wouldn't recommend it since this may cause too much standoff and hinder proper soldering of the other pins. On QFP, I see no negative side effects; although, for high reliability in high-vibration environment, I wouldn't trust the insulation, even when reinforced with the silk screen.

[kony]

Soldermask cannot ever be relied upon as functional insulation. Pinholes, scratches and occasional blister do happen and you will run into problems with undesired shorts and/or leakages sooner rather than later if you decide to risk it. Here the silkscreen is used as zero additional cost reinforcement of the insulation of traces routed under unsoldered pins. It still is ugly and drity hack and your assembly people will hate you profoundly for breaking the planarity of the TQFP land pads and really should not be used in anything that is not truly bottom of the barrel consumer goods. While for TQFP it is marginal practise, for QFN/DFN it is absolute no-go. There even chip outline silkscreen placed under the chip package can cause problems with seating and flux residues egress from beneath the package during reflow.

BTW I had seen this in the wild (including the silkscreen second layer) as failure mechanism on some noname TV PSU boards already. Just don't do that.