Advantest R6581 8.5 digit DMM mini teardown/repair

[Mickle T.]

A 6581 DCI schematic diagram is very similar to HP 3458A one.

[szszjdb]

Hi, Mr. Mickle.T,
Thanks a lot!

I will try to check it tonight. I took off  the pcb last night, but confused with the track as it was multilayer PCB than 2. Many track were under the top or bottom layer. But  I am sure the shunt ,900k and 90k res , were connected to MAX327 and others connected to relay. So it is really like 3458, but the FET were replaced by MAX327.
In my case, the MAX327 might have been damaged and have more leakage than normal, leading to zero offset of lowest range in DCI  mode . I will find a replacement for it.

BTW, I got a question that where is the boot point connected to in 3458 circuit and what is the purpose? I also saw the same layout on 6581 PCB ,but hard to find the connection.

It is strange that I can not login last night and it note that my account is banned forever. But now is fine.

Best Regards,
szszjdb

[Mickle T.]

"BOOT" is a designation of equipotential protection (guarding). A guard driver op-amp U107 is located in the input amplifier section.

P.S. I will be very grateful for the photos of the reverse side of the PCB in hi-res

[TiN]

Mickle T., szszjdb
You guys doing great, thanks for contributions  .

[szszjdb]

Hi, Mr. Mickle.T,
Many Thanks !

I will take the photo tonight and send it tomorrow,as my account is banned at home.
I will get the new MAX327  and try it tonight.

Does the 6581 use the same way as 3458 to add the acal current source to the shunt and calibrate the fullscale? I had recorded the current  data in diagnostic mode, as below:
10ma   -9.659214   
1ma   -965.6122   
100ua   -96.5745   
10ua   -9.655528   
1000na   -968.3756   
100na   -97.2028   
10na   -8.504   
Does these data caculated by measured voltage on the shunt? If so, the pricision of DCI rely on the current source, right? But how it can make sure the pricision of the current source in the spec. limit?

Best Regards,
szszjdb

[Mickle T.]

As far I can understand, current shunts and current sources values are calibrated in one ACAL sequence on the base of internal 10 kOhms standard.

[szszjdb]

Hi, Mr. Mickle.T,
I have seen the picture you sent before, but really don't understand the principle inside it.  Could you give me some giude on it?

I also check my 6581 photo, there only 3 pcs metal seal metal foil res , but both of them are not for the reference standard. You means  R212 ,the plastic seal res near the ADC?

Many thanks and Best Regards,
szszjdb

[Mickle T.]

It takes me too long to translate my explanations into English. But a principles of artefact calibration was perfectly described in the HP Journal 04/1989, dedicated to HP 3458A. R6581 performs the calibration almost the same way.

[szszjdb]

Hi, Mr. Mickle.T,

Fully understood the principle. The key is the tranfer ratio ,which might have introduced some small error in the 0.5ppm range.

Many Thanks and Best Regards,
szszjdb

[szszjdb]

Hi, Mr. Mickle.T ?
The new 327 is tried and the issue is same. I finally found out that the U010 were reversed assembling.Pls refer to the picture attached. After corrected it, I record the DCI zero data as below:
              100na        1000na    N=100, 10plc
MAX        0.0551        0.0324
MIN        0.0352        0.0062
AVG        0.0437        0.0212
VPP        0.0199        0.0262
DEV        4.80E-12        5.48E-12
It is improved more but still not near real 0. Does it work normally?  Is there any posible that the  U010 is damaged by reversing ,which leading to that?

I also checked the R6581 Evolution file, that the U010 is the DCI guarding OP, right? Where is the input and output of that OP? The track is under the top/bottom layer and hard to following.

About the guarding, should I connect the guarding port to the LO port when in testing and how to select in the guarding menu, FLOAT or LOW?

Many Thanks and Best Regards,
szszjdb

[Mickle T.]

Thanks for the photo of the PCB's back side. Now, I can recheck my schematic diagrams.
R6581 Evolution file was obsolete and have some mistakes  U010 is ACI-mode signal follower. If you don't have AC RMS board, U010 is  absolutely useless.

[Kleinstein]

Why are they using an AZ OP for AC ? That would be a really crazy choice. Also for a guard, I would not chose an AZ OP.  Have you checked if the LTC1150 is really the right OP for this place - maybe the earlier repair attempt not only turned it around, but also used the wrong type.

There is a chance that one OP could be used for AC and as a guard amplifier.

Even if used only for AC, it might still influence the circuit through it's input bias.  However Mickles drawing suggests a relay that might separate the input.

With already some odd, ill repair attempts before, maybe look for changed parts.

[szszjdb]

Hi, Mr. Mickle.T and Mr. Kleinstein ,
Many Thanks!

I have checked the U010 before desoldering , no sign of ever been soldered and clean enough. The OP on my board is LTC1150, same with others photo attached. Maybe it is wrong in production line.
I have not tested the output pin 6 on pcb and the U010 ,which reversed, might output a high voltage to the ACI route to U001 , leading to higher leakage when in 100na and 1000na DCI range. If so , I am just wondering how the unit pass the final quality test in factory.
Per the test data for 100na and 1000na range, do you take that the 6581 is working normally? Why is there still have 30-50pa zero offset?

Best Regards,
szszjdb

[Mickle T.]

DCI specs includes max 40 pA zero offset. So I think, that your 6581 is working normally.
DCI Schematic diagram draft is below. It only needs to correct errors in relays routing.

[Kleinstein]

I would expect the path for the ACAL current from the ohms source to go the other side of the first relay in the low current path (initially marked as K503).

In that position it does not make sense to Use U010 for a guard.  It would be kind of odd if it would have an effect on the low currents. So effect could be accidentally, like a cold solder joint or loose contact somewhere else.

[Mickle T.]

Sorry for my mistake. U010 is not guard opamp. It is "isolation" follower for the lo-o-o-ong ACI signal path to the AC RMS board.

[szszjdb]

Hi, Mr. Mickle.T and Mr. Kleinstein ,
Thanks a lot!

I have removed the IC socket  for 327 and the DCI zero reduced to around 20pa , better than before.

I just perform the external DCV calibration base on the LTZ1000 reference, and left the OHM as I have not the standard res. Is there any  way to evaluate the linearity of other range of DCV and DCI without the 3458 for reference?

I also change the R2 and R3 to metal foil type and add the C4 47UF for the power rail. It might be useful to the long-term stability.
I also tried the C5 with 22nf, but found some oscillation occured , so removed it.

Best Regards,
szszjdb

[Kleinstein]

There are few possible test for linearity.

One first check would be for DNL by looking at the histogram. This likely would be running with 1 PLC (maybe a little more, if the resolution is not that good in 1 PLC mode) and the non AZ mode. Despite of drift the non AZ mode might be more suitable, as the AZ mode can hide some possible DNL problems. It helps if the temperature / Environment is relatively s Record the data and calculate the histogram for chunks of data of about 1000 Samples  (the best number depends on the noise level).  Ideally one would do this not only with a short but also with a few small stable voltage (e.g. in the range of maybe 0-10 mV) - the DNL will not be the same at every voltage, but may show trouble only at a few critical point. So it would be about the quality of the worst cases.

A second possible check for linearity would be to check if the reading from the sum of two voltages is close to the sum of the readings. The simplest case of this is checking the readings with changed polarity.  This type of test is more like a spot check so testing a rather limited number of point. So it likely won't show the subtile INL problems at a few critical points, like shown in some graphs for the instrument. This type of test is more like sensitive to a smooth low order nonlinearity, like caused by nonlinear resistors. The INL curves shown for the R6581 look more like some INL due to DA in the integration cap - kind of expected with a large integration cap.

[AF6LJ]

I need to get one of these sexy 8.5 digit wondermeters, my HP-3478 just doesn't have the pizzazz anymore.

[Mickle T.]

Current shunts part of 6581 schematic diagrams is fixed now.

[szszjdb]

Hi,  Mr. Kleinstein and Mr. Mickle.T ,
Thanks a lot!
For the DNL, I  haven't got the GPIB cable, so how about use the internal statistic function instead of capture data to PC? It have MAX ,MIN,AVG,MAX-MIN, and STD DEV output. The 6581 has only the 
10plc -100plc setting, so 10plc is ok?
How to estimate the result?

I will try the method for INL and report here.

Thanks to Mr. Mickle.T's schematics. Without them , it's hard to fix the issues of my unit.

Best Regards,
szszjdb

[Mickle T.]

The 6581 has only the 10plc -100plc setting, so 10plc is ok?

Advantest R6581 have an integration time settings in range of 1 us...100 PLC.
By the way, A/D converter have a maximum 10 PLC int. time.

[Kleinstein]

The histogram method needs the PC interface unless the DMM offers this internally. The min / max, average and so on is not a real substitute.
It is with most linearity tests that one would need an interface to a computer, as quite a few data are involved.

It is only the INL test with adding voltages that could be done with manual reading. From the display. This test needs an isolated short time stable reference and maybe a few switches. In a simple version one might get away with a set of 1.5 V batteries in a holder so that they are untouched from switching the inputs - this could be just a manual multi position switch to choose a meaning full sequence of readings, like
0, U1 , U2 , U1+U2 and maybe extra  -U1,  - (U1+U2). In addition U1 and U2 might be chosen to a few values (e.g. via a set of jumpers).

[szszjdb]

Hi,  Mr. Kleinstein and Mr. Mickle.T ,
Thanks a lot!
I had checked the PLC setting,which could be 1PLC, but the the DIGIT is down to 7-1/2. That 's ok ?  I have to find the GPIB cable for the DNL test later.
I also tried the battery method for ANL ,and found normal but the reading is slowly decreased. Then I tried using R6144 to output some other voltage as 100mv, 1v and the reading is normal. It might hard to detect the DNL issue as 6581 is pricision enough.

I had an idea that how about use my LTZ1000 board to output 10V and use 10pcs 10K res in seriers to divide the voltage and test the linearity?  But it is still hard to test the DCI linearity performance.

Best Regards,
szszjdb

[Kleinstein]

Testing linearity on a high grade meter is difficult and it takes time. There is a reason they used a JJA to measure the INL curve they show. It still take quite some time to get "all" the readings.  The other simpler test with a histogram for DNL and the adding of isolated voltages are considerably slower and can thus only provide some point checks.

The LT1000 board and resistor chain could be used for a linearity test, quite similar to the battery version suggested before: use the string of resistors to get a string of approximately equal low noise references. One  could do the U1+U2 -(U1+U2) test on a few points. Alternative one could use the 1 V range to measure the voltage over each resistor and than measure the different sums in the 10 V range.

As the INL is expected rather low, it would likely need more than just one reading. So more like test the single resistor voltages, test the sums and repeat that something like 2 or 3 times to eliminate drift. It also need a careful check on the zero !

DCI linearity is a different field. There is an possible additional effect of the nonlinearity of the shunts - at the sub ppm level one can not assume resistors to be linear per se. Self heating is one effect that can limit the linearity.