Nanovolt scanner card teardown, Keithley 7168 and it's use for resistor logging

[TiN]

I bet only true volt-nut know what is this one:



Prize for correct guess for manufacturer & model number : first to see full set of pics 

[CatalinaWOW]

I don't know what it is, but I always get nervous when I see a situation like the read wire leading to the terminal marked "HIGH"

[Echo88]

Keithley 7168 Nanovolt Card?! 

[Vgkid]

Datron 4910?

[CalMachine]

A Dataproof 160 or 320 scanner unit?

[Pipelie]

Keithley 7168 Nanovolt Scanner Card

[Pipelie]

here is the manual for 7168
http://www.cedesa.com.mx/pdf/keithley/keithley_7168_user_manual.pdf

1.TiN is a fan of keithley, and look at the layout, i bet it is come from keithley
2. Copper Spade Lug, more than 3 channel , should be scanner card relate to Low Thermal EMF
3. most important is the manual of 7168 have a component location drawing.

[TiN]

Yes, it is indeed KI 7168. This card originally designed for 705 scanner, but supported by newer 7001/7002 too.
My 7001 is torn apart for parts, so I will use little DIY solution and RPI to control the card. It have optocoupler inputs and simple to control.
Interesting to see, it has two 15V batteries (white cylinders in corner) to provide isolated power. Still measured ok.



Spade lugs are soldered to wires/inductor legs in sloppy way.



Bottom side of JFETs are covered by plastic cap with gasket. Pins also covered in thermal grease. I wonder why top side with JFETs not enclosed similar way?



JFETs marking is J2771. Anyone know the part number or have datasheet?

[Vgkid]

That is rather strange about the cap being on the underside of the jfets, rather than all around it. From the manual, I can infer that that they are trying to allow them to equalize(to temperature) as quickly as possible. Still, I would have done something about the solder joints on the surface of the PCB.

[Kleinstein]

The top side has the metal cover for the whole circuit. There are not many heat sources there - so rather low temperature gradients.


It is a low volume product, so not every thing might be thought to the end - sometimes good enough is all it needs.
What is a little strange to me, it that the opto-couplers are relatively close, and no thermal insulation there.

[quarks]

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[EmmanuelFaure]

@ TiN : Could you upload/provide a link for high resolution pictures? Thanks you

[Vtile]

Maybe the heat paste is there if the ends of the legs are the place that creates thermoelectric effect with solder and copper or solder & legmaterial, if there is temp difference between legs?  Newb quessing.

Interesting anyway.

[TiN]

@ TiN : Could you upload/provide a link for high resolution pictures? Thanks you

There will be article on my site about it later this week. If you desperate, file-naming rules for any of my pics didn't change .

[EmmanuelFaure]

If you desperate, file-naming rules for any of my pics didn't change .

Found them! I should have started by checking that. Thanks

[Kleinstein]

Normally there should be very little heat sources in the scanner part: the main part is more like gate leakage time control voltage. So more like the low nW range. So with the metal cover there should be very low temperature gradients over most of the board.

It is only the opto-couplers that could could have a significant power (maybe in the 10 mW range from active LEDs).

So I really don't understand those covers and the white paste on the back.

[Assafl]

Normally there should be very little heat sources in the scanner part: the main part is more like gate leakage time control voltage. So more like the low nW range. So with the metal cover there should be very low temperature gradients over most of the board.

It is only the opto-couplers that could could have a significant power (maybe in the 10 mW range from active LEDs).

So I really don't understand those covers and the white paste on the back.

They state in the manual (section 2.6.6 - switching FET thermals) that the FETs normally will have negligible dissipated heat (they give an example of a 1GOhm input voltmeter reading 200mV so the power dissipated is in the order of 10^-19W).

However, they also add that at the maximum current through the FET being 50mA the dissipated heat would be 25mW. They add that at this level of power dissipation substantial thermal voltages can be generated by FET heating. Furthermore, they recommend that one wait for an hour after switching currents larger than 1mA for temperatures to stabilize before measuring.

My guess is therefore that the cover and paste are for ensuring that the FET solder joints are all at near thermal equilibrium (even if one of the pins would normally be marginally warmer as it for example, forms the pad for the die).     

[TiN]

Having cover on top with grease would help this purpose much better though.

[Squantor]

Having cover on top with grease would help this purpose much better though.

I am not so sure, what I can rememeber from my time at NXP is that the gate electrode in JFETs is the substrate. In the TO-92 package the substrate pin is usually the middle pin, maybe by coupling those with thermal grease you get a better coupling instead of putting a cap over the TO-92 bodies and bind them with thermal grease. This is all theory and could be tested.

[TiN]

"Just add level shift".

I don't have supposed scanner to use 7168 as is, but I do have Keithley 7001 skeleton (with parts/VFD removed for donor in 2001). Well, that will do just fine. All I need is to put Raspberry Pi inside, add a level shift breadboard to drive backplane UCN5841's which interface 7168 scanner card, and write some code Onboard switching PSU have handy +6V and +14.6V, so it's easy to downconvert for +5V to power Pi.

 

Will use 16x2 OLED instead of front panel, to show which channel currently used/status/LAN IP.

Bottom compartment can be also used to store few LTZ-based references maybe. 

[TheSteve]

Your pi looks to be short a processor.

[dr.diesel]

Your pi looks to be short a processor.

   I didn't even notice!  Gotta be a good story there.

[TiN]

Oh, i was guessing what was that  hot part on Pi. Moral of the story was don't be lazy and always add buffering on SOC GPIO pins.

I've got Pi running, powered from K7001 PSU. Test dummy socket server-client app also got up to allow control over LAN.

Little bodge with 4 NFETs added to SPI port to act as 3.3V -> 5V level translator. I'll connect it to native 7001 backplane board to control 5814 SRs. With some simple coding should be easy to get going.

[TiN]

Alright, we getting there. Just bit of spaghetti-coding, and should be ready for first run tomorrow.
Suggestions what to test first are welcome!

Today's photos... Just first checks on level translator bodge and testing code to control 7001 backplane serial drivers (UCN5841, latched 8bit driver).



One hour and channels are working fine..

Channel ON:



Channel OFF:



Wiring and rear Pi location:



Looks ugly, but should be good enough. I decided to deviate from my usual "design custom PCB, do weeks and weeks of testing" and just bodged one off thing which seem to work. Don't want this to turn into month-long project.



I don't have original 7001 front panel anymore (well, I have the board, but it has no VFD), so plonked 16x2 OLED instead to show status/IP/etc.



 

[ManateeMafia]

How about measuring thermal offsets and leakage current of all the switches?