[Atmel studio] won't accept !==

[lukewren]

That’s because you’re writing C, not Verilog.

This is one of the reason why I think people who say, “If you know C, you’ll be able to pick up Verilog in no time!” Yeah, sure, despite the fact that the two languages serve different problem domains.

My usual line is "it's like C, but all the lines happen at once".

It gets the point across -- that lots of it is quite familiar (operators and operator precedences for example), but the mindset is completely alien