3 cent MCU

[mark03]

back to topic, i think if this even true, it must be something with low capital investment, like low cost of 2nd hand manufacturing facilities. labor cost, we know its super cheap in that communist governed country. the RnD maybe none, they just buy some template/blueprint/lithography whatever the name is from some company 10-50 years old design. so yeah maybe its possible in ChinaLand. i will concern most on reliability (0¢ QC?) since recently i bought a clone TC1 Transistor Tester with claimed "super anti disturbance" STC15W104 mcu in it from China but it turned out i got a fried FW chip at least thats what i think it is.

Modern semiconductor vendor have very little capital investment beyond their mask sets. The investment is mostly by the companies running the fabs and the assembly and test facilities. These Padauk MCUs are in a 180nm process. Until very recently nobody was implementing low end MCUs in such a fine process. There are no old designs to pick up and run with cheaply. I presume Padauk have engineered these MCUs from the same process baseline as people who were making complex 180nm chips 10 years ago. Things like the toy and commercial gift markets provide opportunities for staggering numbers of small cheap MCUs. Re-engineering old low end 500nm MCUs for a 180nm process and bring substantial cost benefits if done right

I think you got a zero wrong here. You probably mean 18nm but I doubt they'll use such an advanced process for a very cheap microcontroller. It is more likely these are produced in an old (written-off) factory which can do a 180nm process.

I got the zeros right. Most new ARM MCUs being made today are in 180nm or 130nm. The finest processes you see used for MCUs right now are 65nm. Super fine geormetries don't work so well for most MCUs. The costs don't hit a sweet spot, and the processes leak too much for good sleep operation. The biggest incentive for going to 65nm has more to do with integrating RF than making a good MCU, which is why most general purpose MCUs are still in 180nm or 130nm.

afaik most if not all Cortex-M is 90nm

This is correct.  Freescale/NXP/Qualcomm(?) i.MX RT "crossover" Cortex-M7s are a notable exception, at 40 nm.  I have read that ARM expects the design to scale to 28 nm and the i.MX people talk about future GHz-speed parts in the RT lineup.  Not sure what the talk about a new, super-fine 180 nm process was about... that must be some years out of date!

[langwadt]

back to topic, i think if this even true, it must be something with low capital investment, like low cost of 2nd hand manufacturing facilities. labor cost, we know its super cheap in that communist governed country. the RnD maybe none, they just buy some template/blueprint/lithography whatever the name is from some company 10-50 years old design. so yeah maybe its possible in ChinaLand. i will concern most on reliability (0¢ QC?) since recently i bought a clone TC1 Transistor Tester with claimed "super anti disturbance" STC15W104 mcu in it from China but it turned out i got a fried FW chip at least thats what i think it is.

Modern semiconductor vendor have very little capital investment beyond their mask sets. The investment is mostly by the companies running the fabs and the assembly and test facilities. These Padauk MCUs are in a 180nm process. Until very recently nobody was implementing low end MCUs in such a fine process. There are no old designs to pick up and run with cheaply. I presume Padauk have engineered these MCUs from the same process baseline as people who were making complex 180nm chips 10 years ago. Things like the toy and commercial gift markets provide opportunities for staggering numbers of small cheap MCUs. Re-engineering old low end 500nm MCUs for a 180nm process and bring substantial cost benefits if done right

I think you got a zero wrong here. You probably mean 18nm but I doubt they'll use such an advanced process for a very cheap microcontroller. It is more likely these are produced in an old (written-off) factory which can do a 180nm process.

I got the zeros right. Most new ARM MCUs being made today are in 180nm or 130nm. The finest processes you see used for MCUs right now are 65nm. Super fine geormetries don't work so well for most MCUs. The costs don't hit a sweet spot, and the processes leak too much for good sleep operation. The biggest incentive for going to 65nm has more to do with integrating RF than making a good MCU, which is why most general purpose MCUs are still in 180nm or 130nm.

afaik most if not all Cortex-M is 90nm

New families of Cortex M parts are being started in 90nm, 65nm and even 45nm, but the established families are mostly 180nm and 130nm. There is a lot of cost in getting the first part out in a new geometry. The rest of the family follows much more cheaply. The means new parts expanding existing series of MCUs are usually built in the same geometry as all the existing parts.

ST has had cortex-M in 90nm since 2009

[coppice]

This is correct.  Freescale/NXP/Qualcomm(?) i.MX RT "crossover" Cortex-M7s are a notable exception, at 40 nm.  I have read that ARM expects the design to scale to 28 nm and the i.MX people talk about future GHz-speed parts in the RT lineup.  Not sure what the talk about a new, super-fine 180 nm process was about... that must be some years out of date!

Who said anything about 180nm being super-fine? Most Cortex M parts shipping in volume today have been around for 5 years or more, and are mostly in 180nm or 130nm. If you look at the volume ramps for MCUs they are mostly quite slow. Some MCUs peak when they are 10 years old. I doubt anyone is starting a new a new family of larger MCUs at greater than 90nm, but tiny 3 cent MCUs are another matter.

[splin]

If 1K/60bytes isn't enough you can always splash the cash and upgrade to:

PMS132 2K/128bytes 12bit ADC x 12ch sop16 9 cents @ 1K

PMS232 2K/160bytes 12b ADC x 10ch LCD 4x13 sop24 16.7 cents @ 4K

PMC234 Dual core (1 x 8MHz or 2 x 4MHz)! 4k/208bytes, 12bit ADCx11ch, LCD 4x21 (Vdd/2 bias optional), -45 to +85C, sop24 31 cents @ 1K (sop28 also available)

Note that the above prices are from a quick look on YOYCART.com - its likely that much better prices can be found if you know where to look - eg. the PMS150C is 6 cents @ 100, 4 cents @ 1K from a vendor on the same site.

[EDIT] PMC234 are 20 cents @ 1k (1.4 yuan) here: https://cn.made-in-china.com/gongying/weiruiwei01-kohmYEwOMdcy.html

[mbest]

We have to see you try a project with this now.

OTP, hmm otherwise could have been the new wave of open source hardware Daveduino

[Mr. Scram]

We have to see you try a project with this now.

OTP, hmm otherwise could have been the new wave of open source hardware Daveduino

OTP, so any young tinkerer's dream. At least you'll sell plenty.

[brucehoult]

Sadly It's OTP

It's dead cheap. You can afford to waste a few.

Of course. Those MCUs are for very high-volume production and we are talking about 3 cents retail price! There's probably no way they could embed even 1K of Flash for that cost.

The annoying point with this is not to waste parts but since there's apparently no way of running code from external memory, this should be very annoying during the development/debugging phase. Having to replace the chip for every software build? Sucks...

Apparently you didn't bother to read the rest of my post in which I explained how to make it suck less.

[brucehoult]

back to topic, i think if this even true, it must be something with low capital investment, like low cost of 2nd hand manufacturing facilities. labor cost, we know its super cheap in that communist governed country. the RnD maybe none, they just buy some template/blueprint/lithography whatever the name is from some company 10-50 years old design. so yeah maybe its possible in ChinaLand. i will concern most on reliability (0¢ QC?) since recently i bought a clone TC1 Transistor Tester with claimed "super anti disturbance" STC15W104 mcu in it from China but it turned out i got a fried FW chip at least thats what i think it is.

Modern semiconductor vendor have very little capital investment beyond their mask sets. The investment is mostly by the companies running the fabs and the assembly and test facilities. These Padauk MCUs are in a 180nm process. Until very recently nobody was implementing low end MCUs in such a fine process. There are no old designs to pick up and run with cheaply. I presume Padauk have engineered these MCUs from the same process baseline as people who were making complex 180nm chips 10 years ago. Things like the toy and commercial gift markets provide opportunities for staggering numbers of small cheap MCUs. Re-engineering old low end 500nm MCUs for a 180nm process and bring substantial cost benefits if done right

I think you got a zero wrong here. You probably mean 18nm but I doubt they'll use such an advanced process for a very cheap microcontroller. It is more likely these are produced in an old (written-off) factory which can do a 180nm process.

I got the zeros right. Most new ARM MCUs being made today are in 180nm or 130nm. The finest processes you see used for MCUs right now are 65nm. Super fine geormetries don't work so well for most MCUs. The costs don't hit a sweet spot, and the processes leak too much for good sleep operation. The biggest incentive for going to 65nm has more to do with integrating RF than making a good MCU, which is why most general purpose MCUs are still in 180nm or 130nm.

afaik most if not all Cortex-M is 90nm

New families of Cortex M parts are being started in 90nm, 65nm and even 45nm, but the established families are mostly 180nm and 130nm. There is a lot of cost in getting the first part out in a new geometry. The rest of the family follows much more cheaply. The means new parts expanding existing series of MCUs are usually built in the same geometry as all the existing parts.

SiFive's E2 and E3 series cores are roughly equivalent to Cortex M. The FE310 SoC in the HiFive1 and (3rd party) LoFive is made in 180nm. It would be dead cheap if made in volume .. a few cents each despite being 32 bit, 32 registers, 16 KB SRAM scratchpad, 16 KB L1 instruction cache and running at 256 to 320 MHz.

By far the biggest cost is the packaging! That's the mystery with a 3c chip, not the CPU.

SiFive customers are using the same cores (same RTL) on chips down to and including 7nm, in things such as flash/SSD controllers and SerDes.

[Mechatrommer]

I dont think OTP is a big issue, its not like super big mcu that handles gui and needs regular fw update. If you remember your small mcu dev how many times do you have to debug-fix-burn cycle until the fw really works?  10, 50, 100? even if you are the sloppiest programmer that you have to reprogram 100x, thats still $3 of cost, and that mainly due to your slopiness. I would say 10-20 burnt otp chips average, for average programmer hence 60 cents cost. And that before any further cost  saving technique is implemented such as simulator board or chip mentioned. and i believe there are gems and legendary tactics from distance past like how they do it less than 1K for apollo mission? This otp will enforce us to dig this kind of thing rather than it dies with the old champions. Imho. PS: Well i just checked apollo agc is 38'KW' rope memory ROM not 1KWd...

[langwadt]

I dont think OTP is a big issue, its not like super big mcu that handles gui and needs regular fw update. If you remember your small mcu dev how many times do you have to debug-fix-burn cycle until the fw really works?  10, 50, 100? even if you are the sloppiest programmer that you have to reprogram 100x, thats still $3 of cost, and that mainly due to your slopiness. I would say 10-20 burnt otp chips average, for average programmer hence 60 cents cost. And that before any further cost  saving technique is implemented such as simulator board or chip mentioned. and i believe there are gems and legendary tactics from distance past like how they do it less than 1K for apollo mission? This otp will enforce us to dig this kind of thing rather than it dies with the old champions. Imho. PS: Well i just checked apollo agc is 38'KW' rope memory ROM not 1KWd...

the debug-fix-burn cycle is not so easy so8

some Hitachi MCU have flash that is only rated for 100 writes

[SilverSolder]

... and put in your resume:
"Can design ultra low cost, super mass produced, almost Chinese toys".

I remember tracing out the circuit of a one transistor USB 5V mains adaptor, out of curiosity...  it was a work of art!  If that guy had access to one of these 3 cent CPUs...

[SiliconWizard]

Sadly It's OTP

It's dead cheap. You can afford to waste a few.

Of course. Those MCUs are for very high-volume production and we are talking about 3 cents retail price! There's probably no way they could embed even 1K of Flash for that cost.

The annoying point with this is not to waste parts but since there's apparently no way of running code from external memory, this should be very annoying during the development/debugging phase. Having to replace the chip for every software build? Sucks...

Apparently you didn't bother to read the rest of my post in which I explained how to make it suck less.

I did but unless I missed something, you suggested developing your own emulator.
I wouldn't seriously consider having to develop an emulator just to be able to develop for a 3 cents chip, all the more that it could take much longer to develop than expected and could be actually hard to validate. Unless I was working for a chinese company willing to develop a 20 cents product that would sell by tens of millions, I have a hard time seeing the point. Obviously that's just my opinion.

Apparently as someone pointed out, there is an existing emulator, but I also mentioned why I think it could still suck in quite a few situations, and I also don't know how much we could trust this emulator.

Anyway. As Dave said in his video that I just saw, it's very interesting to take a look at what the asian, and especially the chinese do. They are a lot more creative nowadays that we often think, and they follow a clear path of self-sufficiency IMO. Even if they could get a Microchip MCU for 3 cents, they most likely would still develop their own. That's something we western people have to realize. Using their parts doesn't necessarily make much sense for non-asian countries though for various reasons. Whereas the chinese electronics industry tends to have more of a concern with unit manufacturing costs, western countries most often tend to have more of a concern with product development costs that can get out of hand easily and has a much higher impact.

Just my 2 cents. (Cheaper than 3!)

[Mechatrommer]

They are a lot more creative nowadays that we often think, and they follow a clear path of self-sufficiency IMO.

well you know why Trump went panic with his Tariff policy on those Kaminoans... what i'm afraid the future is the worst of fully closed source even the datasheet, so there is no more hope for hobbiests. i heard EU is already imposing the rule if i understand it correctly. TLDR: https://savecodeshare.eu/static/assets/WhitePaper-ImpactofArticel13onSoftwareEcosystem-SaveCodeShare.pdf

[brucehoult]

Sadly It's OTP

It's dead cheap. You can afford to waste a few.

Of course. Those MCUs are for very high-volume production and we are talking about 3 cents retail price! There's probably no way they could embed even 1K of Flash for that cost.

The annoying point with this is not to waste parts but since there's apparently no way of running code from external memory, this should be very annoying during the development/debugging phase. Having to replace the chip for every software build? Sucks...

Apparently you didn't bother to read the rest of my post in which I explained how to make it suck less.

I did but unless I missed something, you suggested developing your own emulator.
I wouldn't seriously consider having to develop an emulator just to be able to develop for a 3 cents chip, all the more that it could take much longer to develop than expected and could be actually hard to validate. Unless I was working for a chinese company willing to develop a 20 cents product that would sell by tens of millions, I have a hard time seeing the point. Obviously that's just my opinion.

I explained how easy it would be to develop an emulator. That doesn't necessarily mean you need to do your own -- probably someone else already has. As has been pointed out, the company offers an ICE for $100. It would be interesting to know how that works, but it could well be simulator software running on a bigger MCU.

I wrote a 6502 emulator in VAX Pascal one evening in 1982 (when I was 19) because I wanted to test my solution to the 6502 assembly language assignment and the hardware lab with the AIM-65 boards was closed until the next day. I made two errors: 1) I reversed the sense of the C flag in SBC; 2) the "read a char from the terminal if there is one, otherwise don't wait" function I worked up to enable interrupting a running simulation and drop into the debugger turned out to totally hammer the CPU. I fixed both of those the next day, and by the end of the week *everyone* was using my simulator and the lecturer agreed to accept output from it as proof programs worked.

This CPU is simpler than a 6502, at least in the instruction set. I have no doubt I could get a debugged simulator going in a day. The peripherals would take longer, though the advantage of writing your own is you only have to write the bits you need.

[westfw]

OTP programming methods not documented.Instruction set not documented.  (can't even tell how wide a "word" is !)
If you can't get their IDE or programmer to work, you're screwed.
Weird hybrid assembler/C programming language ("Min-C"?)
The IDE seems to have pretty extensive built-in "help", but I can't find a pdf...

[David Hess]

Process selection for microcontrollers also depends on the availability of floating gate storage for code.  I think the densest processes with this are somewhere around 65 or 45 nanometers right now.

There are also diminishing returns when bond wire requirements are taken into account.  This discussion came up on RWT in connection with producing old processors like the Z80 and 8086/8088 on a modern semiconductor process.  At some point, the die size becomes bond wire limited and no further reduction in area is possible.

[westfw]

The IDE seems to have pretty extensive built-in "help"

So I've been experimenting...

• wow, those "primitive" IDEs are "Zippy"!  (sigh.)
• to get the "build" command to appear, create project rather than just a file.
• The error messages suck are not what I'm used to.
• The compiler output files are in an unknown format.
• AFAICT, there's no "listing"...
• ... Or simulator (wasn't really expecting one.)  The standard set of debug commands requires the ICE

[mikeselectricstuff]

the debug-fix-burn cycle is not so easy so8

[brucehoult]

OTP programming methods not documented.Instruction set not documented.  (can't even tell how wide a "word" is !)
If you can't get their IDE or programmer to work, you're screwed.

Yes, the document I read described the instructions functionally but not the binary encoding. The data memory is clearly 16 bit and word-addressed. There's syntax for loading and storing the lo and hi halves of a memory word. That'll just go to a bit in the opcode, of course.

I did a rough count up of the number of possible instructions. There are too many instructions with 8-bit immediates or addresses to fit into a 12 bit word I think. But far from needing 16. Let's guess 14 bits for now :-)

No problem to reverse-engineer if you get an assembler from them.

[ali_asadzadeh]

What IDE and compiler do they have? any app-notes? can it be done in C?

[westfw]

Quote

No problem to reverse-engineer if you get an assembler from them.

See my next message about not getting a recognizable form of binary file, or program listing...

The instruction set looks like a somewhat improved "Microchip PIC16" architecture.

• Single "Accumulator"
• Accumulator/Memory math operations with result going to either.
• "skip" instructions, include inc/dec and skip on zero
• "add to PC" for table lookups.  "return" instruction with value...

Improvements:

• ram-based stack
• Separate IO and RAM space (although I guess that could be an assembly-language hack.)
• exchange Ac/M instruction.
• Add/sub w Carry.
• Use of any M as indirect address (?)

if it's a copy, rather than just "influenced", I'm impressed that they re-wrote all the instruction mnemonics (and it's interesting that the sort of "maximized" the list, rather than Microchip's "minimized" version.)  (and... to contemplate that with modern HW design techniques, you could design a CPU with the same architecture and functions as an existing chip, but completely scramble the binary instruction format.  I never thought of that before...)

[westfw]

What IDE and compiler do they have? any app-notes? can it be done in C?

I don't recognize it.  Very high-contrast, Black-background, rather DOS-looking (but has "W95" style windows/icons, and seems to make good use of a big screen.)
Compiler isn't identifiable, either.  The whole thing looks like a single executable...

They seem to have a C-like language they can Min-C.  Weird-looking...  I approve, in some ways, but I'm not very enthusiastic about dealing with ... weirdness.

[mikeselectricstuff]

Looking at some of the example/generator code, the C looks as complete as it needs to be for this scale of part.
Has anyone found any English documentation for the language ? Guessing it's something slightly more than a macro-assembler.
I had a quick skim through the IDE .exe with hexplorer and didn't see any obvious keyword list.

[brucehoult]

OTP programming methods not documented.Instruction set not documented.  (can't even tell how wide a "word" is !)

I don't know how big the I/O space is. I'm assuming 5 bits just like the directly addressable memory.
If it's limited to just this part then I get 6774 total instructions, which you could encode in 13 bits.

However someone posted part numbers for versions with 2K and 4K words of program space. That expands the number of instructions to 12918, which needs 14 bits.

e.g. possible encoding

0 op1 addr12 - call/goto addr
100 op3 imm8 - mov,add,sub,and,or,xor,ceqsn,ret immediate
1010 op2 sel3 io5 - set0,set1,t0sn,t1sn  reg.bit
10110 dir1 op3 addr5 - mov,add,addc,sub,subc,and,or,xor a,M or M,a
10111 op4 addr5 - subc,addc,inc,dec,clear,xch,sr,src,sl,slc,not,neg,izsn,dzsn,ldt16,stt16 M
110000 op2 sel3 addr4 - set0,set1,t0sn,t1sn M.bit
11000100 dir1 io5 - mov a,IO or IO,a
11000101 dir1 addr5 - ldxm a,M or M,a (indirect load/store via 16 bit address)
110001100 addr5 - ceqsn a,M
110001101 op5 - pushaf,popaf,addc a,subc a,sr a,src a,sl a,swap a,not a,neg a,izsn a,dzsn a,ret,reti,nop,pcadd a,engint,disgint,stopsys,stopexe,reset,wdreset

There's still 7*512 + 2 * 32 + 10 =  3658 unused opcodes in this scheme. Looks like the I/O address space could actually be 7 bits (i.e. 128 bytes) and still be able to rearrange things to fit.

[westfw]

Quote

Has anyone found any English documentation for the language ?

Yeah - the "Application Note" menu seems to have documentation that is reasonably complete (better than that even.  Well, some sections are missing.)
It keeps asking me to install "Chinese Traditional" fonts, but I click "cancel" and it displays mostly ascii and english  (not great english, but.  in significant detail.  "Chatty", even.)  There's a "help" subdirectory of the install that seems to contain "different" help, as well...
Hmm.  Doesn't seem to copy/paste for me.  Here's another screenshot: