A fairly simple 8051-based SBC project.

[technix]

Here is the features I shot for on this project:

* 8051-compatible processor: AT89C51RC @ 24MHz
* Von Neumann connected system bus
* 32kB EEPROM, 32kB SRAM (0x0000 - 0x7fff = AT28C256, 0x8000 - 0xffff = IS61C256)
* PIC16F1455 for USB virtual serial port and system control (including reset)
* Serial 128x64 graphic display (ST7920 controller, contains built-in character generator)
* PS/2 interface for keyboard
* DS1307 RTC
* Buzzer
* Fully through hole construction
* Board size identical to the LCD display module

How do you guys think?

I found PIC16F1455. Here is the (almost) complete BOM:

* 1x AT89C51RC-24PU
* 1x SN74HC00N
* 1x SN74HC573N
* 1x IS61C256AH-15N
* 1x AT28C256-15PC
* 1x PIC16F1455-I/P
* 1x DS1307N
* 1x ST7920-based LCD module
* 1x USB Mini-B connector
* 1x PS/2 connector
* 2x 22 resistors
* 2x 4.7k resistors
* 7x 220nF MLCC
* 2x 22nF ceramic disk capacitor
* 1x 16MHz HC-49/S crystal (12MHz will work too, with different fuse settings in the PIC though)
* 1x 32768Hz warch crystal
* 1x buzzer
* 1x SS9015 PNP BJT
* 1x 2N7000 NMOSFET

The PIC16F1455 generates the 24MHz clock for 8051 from its internal 48MHz clock, provides USB CDC, and handles switching the 8051 between internal ROM and external ROM booting.

[ChristofferB]

Sounds interesting! What code is it going to run? Something BASIC-y?

[technix]

Sounds interesting! What code is it going to run? Something BASIC-y?

I have not figured out what code I should make it run yet. The wiring along with the 32kB internal ROM in the chip allows me to go both ways. My original plan was to run native code only, using the internal ROM as a bootloader, and store actual application code in the external EEPROM. If I ended up running BASIC, the interpreter and OS will have to sit in the internal ROM while the external ROM is used as a filesystem of sorts.

[JPortici]

I may run into sourcing problems as PIC16F1455 is very difficult to hunt down

why? are you planning to do tens of thousands of units? still, usually microchip's lead time is less than 10 weeks

[technix]

I may run into sourcing problems as PIC16F1455 is very difficult to hunt down

why? are you planning to do tens of thousands of units? still, usually microchip's lead time is less than 10 weeks

I can't find them in local electronic component stores.

[JPortici]

fair enough, though i bet ebay or microchip sample program can be of help
still, microchip direct has ton of them and (at least here) 10€ shipping

[stfsux]

* Von Neumann connected system bus

I'm not sure to understand.
i8051 is normally a modified harvard architecture, or are you talking about something else?

[Kalvin]

* PIC16F1455 for USB virtual serial port and system control (including reset)

If you just want a USB serial port, why don't you use those cheap FTDI or similar USB-to-serial modules available on eBay for $1.30? Typically those modules have DTR-signal which can be used for the reset purposes.

[technix]

* PIC16F1455 for USB virtual serial port and system control (including reset)

If you just want a USB serial port, why don't you use those cheap FTDI or similar USB-to-serial modules available on eBay for $1.30? Typically those modules have DTR-signal which can be used for the reset purposes.

8051 needs external active-high POR  which should be present regardless of the prescence of a USB host, and this chip generates that signal. It also generates the signal intended for the EA pin if I decided to store native code on the EEPROM and use the onboard ROM as a bootloader.  I don't think that a simple USB to serial chip can do all those. In fact the USB interface will have to be a bit more complicated for that.

[jesuscf]

Either the AT89LP51RD2 or the AT89LP51ED2 are a much better option than the AT89C51RC.  They both come with 64k of ISP Flash and 2k of RAM.  The ED2 comes with 4k of EEPROM as well.  On top of that you'll get a built-in serial boot loader, a one clock per cycle CPU, and a sometimes usable 10-bit ADC.

[technix]

Either the AT89LP51RD2 or the AT89LP51ED2 are a much better option than the AT89C51RC.  They both come with 64k of ISP Flash and 2k of RAM.  The ED2 comes with 4k of EEPROM as well.  On top of that you'll get a built-in serial boot loader, a one clock per cycle CPU, and a sometimes usable 10-bit ADC.

I cannot source them (similar situation as PIC16F1455 - in fact AT89LP series faces extremely harsh competition from STC equivalents that is much cheaper, so they are even more expensive to find and nigh impossible to find.)

And this design being a dual purpose (running BASIC using interpreter in internal Flash, or running native code directly off the external EEPROM) means the processor must be able to be forced external code and data memory in Von Neumann bus.

[westfw]

Von Neumann connected system bus

I'm not sure to understand.   i8051 is normally a modified harvard architecture

Presumably he means that he's setting up the bus so that external RAM and external Program space share the same bus.  (that probably means that a chip with 64k internal memory is "undesirable", because you'd want to have the flexibility of putting some code in the external memory.   Or do the 64k versions have a provision for turning off internal flash in pieces?)

[ebclr]

I don't know why you want to do this board, it's hard to understand

I would suggest buy this one and you your time for some other stuff like firmware

https://world.taobao.com/item/37792947308.htm?spm=a312a.7700714.0.0.fRMBBX#detail

[technix]

I don't know why you want to do this board, it's hard to understand

I would suggest buy this one and you your time for some other stuff like firmware

https://world.taobao.com/item/37792947308.htm?spm=a312a.7700714.0.0.fRMBBX#detail

Do that thing get any chance to run BASIC? Does that board also serve as a teaching tool for students learning computer consistency?

[stfsux]

@westfw oh yeah ok. nvm 

[ebclr]

For sure, and better than 89C51, that board is only a cheaper, smaller and faster 89C51 also less power from supply

[technix]

For sure, and better tha 89C51, that board is only a cheaper, smaller and faster 89C51

I have that exact chip. And no it does not work in this design. STC chips does not have the required EA pin.

[ebclr]

Chip is not STC

Is silabs

Why external memory, if all memory address are filled up internally

[technix]

Chip is not STC

Is silabs

Why external memory, if all memory address are filled up internally

Can I fill the data into the external memory, and immediately jump into it? I am using a Von Neumann external bus.

[ebclr]

I put the wrong link

the correct is

https://world.tmall.com/item/12500559730.htm?spm=a312a.7700714.0.0.D7Zo2C

Yes you can access external memory   ( http://www.silabs.com/Support%20Documents/TechnicalDocs/C8051F32x.pdf )

12.1. Accessing User XRAM
XRAM can be accessed using the external move instruction (MOVX) and the data pointer (DPTR), or using
MOVX indirect addressing mode. If the MOVX instruction is used with an 8-bit address operand (such as
@R1), then the high byte of the 16-bit address is provided by the External Memory Interface Control Register
(EMI0CN as shown in Figure 12.1). Note: the MOVX instruction is also used for writes to the Flash
memory. See Section “11. Flash Memory” on page 106 for details. The MOVX instruction accesses XRAM
by default.
For any of the addressing modes the upper 5 bits of the 16-bit external data memory address word are
"don't cares". As a result, the 2048-byte RAM is mapped modulo style over the entire 64k external data
memory address range. For example, the XRAM byte at address 0x0000 is also at address 0x0800,
0x1000, 0x1800, 0x2000, etc.
Important Note: The upper 1k of the 2k XRAM functions as USB FIFO space. See Section 12.2 for
details on accessing this memory space.

[ebclr]

If this will be used for educational purposes , i would sugest take a look here

http://www.edsim51.com/

[technix]

I put the wrong link

the correct is

https://world.tmall.com/item/12500559730.htm?spm=a312a.7700714.0.0.D7Zo2C

Yes you can access external memory   ( http://www.silabs.com/Support%20Documents/TechnicalDocs/C8051F32x.pdf )

12.1. Accessing User XRAM
XRAM can be accessed using the external move instruction (MOVX) and the data pointer (DPTR), or using
MOVX indirect addressing mode. If the MOVX instruction is used with an 8-bit address operand (such as
@R1), then the high byte of the 16-bit address is provided by the External Memory Interface Control Register
(EMI0CN as shown in Figure 12.1). Note: the MOVX instruction is also used for writes to the Flash
memory. See Section “11. Flash Memory” on page 106 for details. The MOVX instruction accesses XRAM
by default.
For any of the addressing modes the upper 5 bits of the 16-bit external data memory address word are
"don't cares". As a result, the 2048-byte RAM is mapped modulo style over the entire 64k external data
memory address range. For example, the XRAM byte at address 0x0000 is also at address 0x0800,
0x1000, 0x1800, 0x2000, etc.
Important Note: The upper 1k of the 2k XRAM functions as USB FIFO space. See Section 12.2 for
details on accessing this memory space.

What I mean is 1) reading and writing code memory on the fly and 2) execute code that is just written.

[Bruce Abbott]

What I mean is 1) reading and writing code memory on the fly and 2) execute code that is just written.

You can do this if you make the external RAM respond to both program and data memory requests. /PSEN goes low to indicate reading external program memory, while /RD or /WR goes low when accessing external data memory. RAM /CE (and /OE) could be generated by combining /PSEN, /RD, and /WR with a 3 input AND gate.

On the AT89C51RC, connecting /AE to +5V maps the lower 32k of program memory to internal Flash and the upper 32k to external ROM. So you could have 32k of operating system in internal Flash, and 32k of external RAM for user programs and data. 

[technix]

What I mean is 1) reading and writing code memory on the fly and 2) execute code that is just written.

You can do this if you make the external RAM respond to both program and data memory requests. /PSEN goes low to indicate reading external program memory, while /RD or /WR goes low when accessing external data memory. RAM /CE (and /OE) could be generated by combining /PSEN, /RD, and /WR with a 3 input AND gate.

On the AT89C51RC, connecting /AE to +5V maps the lower 32k of program memory to internal Flash and the upper 32k to external ROM. So you could have 32k of operating system in internal Flash, and 32k of external RAM for user programs and data.

I have 32k SRAM (0x8000 - 0xffff) and 32k EEPROM (0x0000 - 0x7fff,) making full 64k external memory, so slightly different wiring:

/OE = /PSEN * /RD
/WE = /WR
/CS(EEPROM) = A15
/CS(RAM) = /A15

So, all those is going through one  74HC00.

[technix]

Now I got a breadboard prototype up, how do I implement a boot loader and a BASIC interpreter then?

Do you guys consider this a good idea, instead of implementing the interpreter in 8051 directly, implement a byte code virtual machine in the onboard ROM, and create a BASIC compiler (or LLVM backend if I want C and C++) targeting this byte code for PC.