Advice on fpga, cpld or psoc. The next step

[hneve]

I'm going out of my mind, I'm looking for something new to play with and have been thinking about fpga's then I found cpld's that's much cheaper and now I look at psoc and I get swamped.

I want something that has a lot of possibilities that doesn't cost the shirt of my back to play with. I'm a hobbyist with a ee degree 20yrs since that never got any use before I started with arduino a few years back. Now I would like a new challenge but I get so frustrated, there is so much to choose from and I'm kinda lost.
Can we have a discussion about which of these technologies would be a "natural" step up from uC.
And I'm not thinking of arm uC's

A though about price v.s performance and abilities wouldn't hurt I guess.

[tggzzz]

I'm going out of my mind, I'm looking for something new to play with and have been thinking about fpga's then I found cpld's that's much cheaper and now I look at psoc and I get swamped.

I want something that has a lot of possibilities that doesn't cost the shirt of my back to play with. I'm a hobbyist with a ee degree 20yrs since that never got any use before I started with arduino a few years back. Now I would like a new challenge but I get so frustrated, there is so much to choose from and I'm kinda lost.
Can we have a discussion about which of these technologies would be a "natural" step up from uC.
And I'm not thinking of arm uC's

A though about price v.s performance and abilities wouldn't hurt I guess.

When you are buying any board, look carefully at the GND (and VCC) pins. The outputs are so fast and powerful that ground bounce and reflections are real problems. Try to get a board where there is a GND (or VCC) for every 2-3 signals, and they are well interspersed between the signals, not grouped together at one end.

To oversimplify, FPGAs have more registers each with fewer combinatorial blocks; CPLDs have fewer registers each with larger combinatorial blocks. Routing is more of an issue with FPGAs.

All FPGA tools are very complex and completely proprietary. They will run, and be able to mix-and-match, Verilog and VHDL source.

On the Xilinx side there are two: ISE (for older simpler devices up to and including Spartan 6, and won't be developed further) and Vivado (for newer bigger devices including those that also contain dual-core ARMs). They (seem to) run better on Linux, and there are cost-free versions available for the smaller devices.

I don't know about Altera. I haven't used CPLDs for 20 years, so I'm out of date.

[mian2zi3]

All FPGA tools are very complex and completely proprietary.

Not true anymore!  There is a purely open source toolchain for the Lattice iCE40 family of FPGAs.  It has been reversed engineered as part of the icestorm project.  Yosys is an open source Verilog synthesis tool and place and route is done by arachne-pnr.  Some links:

https://github.com/cseed/arachne-pnr
http://www.clifford.at/yosys/
http://www.clifford.at/icestorm/

There is also a $21 iCE40HX1K USB stick/development board:

http://latticesemi.com/iCEstick

I'm author of arachne-pnr.  Feedback welcome if you try out the tools!

[tggzzz]

All FPGA tools are very complex and completely proprietary.

Not true anymore!  There is a purely open source toolchain for the Lattice iCE40 family of FPGAs.  It has been reversed engineered as part of the icestorm project.  Yosys is an open source Verilog synthesis tool and place and route is done by arachne-pnr.

Maybe, maybe not. Maybe they have managed to correctly route designs. Have they correctly assigned wire delays and gate delays, and optimised placement?

If you want to go that route it does have one significant advantage: you have to ignore most devices and boards on the market, which drastically simplifies the search space and your choices.

[AndyC_772]

Surely the purpose of an open-source tool is to provide something which is either free of charge, or which does something that existing tools won't do?

So what, exactly, would be the reason to use an open-source FPGA tool, when FPGA tools (for small to medium devices, at least) are generally already free of charge and support all the chips' features?

Seems to me like it's an academic exercise, something which is done 'because we can', not because there's an objective need.

Personally I'd pick up a board like this one, download a version of Quartus that supports the Cyclone 1 family (that would be 11.0sp1, see here), and learn VHDL.

[mian2zi3]

All FPGA tools are very complex and completely proprietary.

Not true anymore!  There is a purely open source toolchain for the Lattice iCE40 family of FPGAs.  It has been reversed engineered as part of the icestorm project.  Yosys is an open source Verilog synthesis tool and place and route is done by arachne-pnr.

Maybe, maybe not. Maybe they have managed to correctly route designs. Have they correctly assigned wire delays and gate delays, and optimised placement?

True, it is a work in progress.  It is possible to reverse engineer the timing information for these devices, but the icestorm project hasn't finished yet.  It is my intention to support timing-driven place and route when that is done.

[nctnico]

Surely the purpose of an open-source tool is to provide something which is either free of charge, or which does something that existing tools won't do?

So what, exactly, would be the reason to use an open-source FPGA tool, when FPGA tools (for small to medium devices, at least) are generally already free of charge and support all the chips' features?

'Because the free tools from FPGA vendors suck' is one of the reasons that pops into my mind. Xilinx ISE for example is nothing more than a crappy IDE around a couple of command line tools. It is easy for a beginner to get started with but it is a far cry from a professional tool.

@mian2zi3: what would be a great idea for your project is to somehow make it work with Eclipse. Maybe start with an error parser so Eclipse can annotate coding errors in the source code.

[mian2zi3]

Surely the purpose of an open-source tool is to provide something which is either free of charge, or which does something that existing tools won't do?

So what, exactly, would be the reason to use an open-source FPGA tool, when FPGA tools (for small to medium devices, at least) are generally already free of charge and support all the chips' features?

Seems to me like it's an academic exercise, something which is done 'because we can', not because there's an objective need.

Personally I'd pick up a board like this one, download a version of Quartus that supports the Cyclone 1 family (that would be 11.0sp1, see here), and learn VHDL.

Surely those can't be the only reasons?  As you say yourself, maybe the purpose is an academic exercise or "because we can"?  I can think of another reason: freedom.  I refer you to Stallman's four freedoms: freedom to run, study, distribute and improve.

https://www.gnu.org/philosophy/free-sw.en.html

No-cost proprietary software only grants one of those freedoms (to run).  hneve didn't say why he's looking for "something new to play with", but to study and improve might well be on his list, no?  My electronics projects (this one included) are primarily about self-education.  I can't be alone in that here.

Finally, this software is only a few weeks old, but I'm already aware of two ideas that aren't possible with vendor tools: running the toolchain on an Raspberry Pi to reprogram a RPi FPGA HAT in the field and using it to place/route asynchronous designs (although the latter may depend on timing information still in progress). 

[mian2zi3]

@mian2zi3: what would be a great idea for your project is to somehow make it work with Eclipse. Maybe start with an error parser so Eclipse can annotate coding errors in the source code.

Hi nctnico, thanks for the suggestion!  I'll add it to the list.  In the short term, we're focusing on functionality.  I'm currently working on supporting PLLs and the 8K variant.  For larger designs, the latter is going to need some algorithmic improvements including probably analytic placement (currently we use simulated annealing).

[nctnico]

@mian2zi3: what would be a great idea for your project is to somehow make it work with Eclipse. Maybe start with an error parser so Eclipse can annotate coding errors in the source code.

Hi nctnico, thanks for the suggestion!  I'll add it to the list.  In the short term, we're focusing on functionality.  I'm currently working on supporting PLLs and the 8K variant.  For larger designs, the latter is going to need some algorithmic improvements including probably analytic placement (currently we use simulated annealing).

Maybe you could somehow use the veditor project. This is an open source plugin for Eclipse for Verilog and VHDL.

[tggzzz]

All FPGA tools are very complex and completely proprietary.

Not true anymore!  There is a purely open source toolchain for the Lattice iCE40 family of FPGAs.  It has been reversed engineered as part of the icestorm project.  Yosys is an open source Verilog synthesis tool and place and route is done by arachne-pnr.

Maybe, maybe not. Maybe they have managed to correctly route designs. Have they correctly assigned wire delays and gate delays, and optimised placement?

True, it is a work in progress.  It is possible to reverse engineer the timing information for these devices, but the icestorm project hasn't finished yet.  It is my intention to support timing-driven place and route when that is done.

And when the manufacturer tweaks their process or drops/introduces a device, start all over again. It will always be a work in progress, and several years/decades behind the times. Sorry.

And when a user finds something doesn't work in the way they expected, they will be left wondering whether is it their design or your toolchain - and won't have any way of sorting it out. Having said that, I recognise that manufacturer's tool chains aren't bugfree - but manufacturers have a very strong incentive and the information to sort it out.

[hneve]

@tggzzz: I will take a good look at power distribution and see if I spot signal problems when i decide on a dev board, thank you

@AndyC_772: Thank you for your suggestion, i might look into that fpga board.

@mian2zi3: You a 100% correct, I'm looking into this because i feel the need to twist my mind around something new, its purely for my own development and just as i have long since taken away the training wheels of arduino wiring (for larger projects, lets not get stupid about how fast you can get stuff working with that ... ya ) and why i did that was also purely 'because i can/want to' so you're not alone doing things harder than necessary just to challenge yourselves.
 

this wasn't exactly the discussion i was hoping for, I hoped to get a few feelers about whether to look closer into one of those technologies, as mentioned i an only a humble hobbyist and would like to broaden my horizon, my biggest problem is time, I'm a full time taxidriver, husband, and father to two beautiful children that i love above all. So when it comes to my hobby I try not to waste time. So I hope some of you can help me shed some light on what is more a next step after mastering (cough) avr's

[Rasz]

check out XMOS XCore, they make 8/16 core 500/1000MIPS chips for low level hard realtime GPIO manipulation. Power of fpga with ease of microcontroller programming.

[poorchava]

IMHO the difficulty goes like this PSoC < CPLD < FPGA. This is because there is almost a complete drag & drop IDE for PSoC, and CPLDs are simpler and have more deterministic timing that FPGAs.

On the other hand I think right now the border between CPLDs and FPGAs is pretty blur.

Sent from my HTC One M8s using Tapatalk

[suicidaleggroll]

this wasn't exactly the discussion i was hoping for, I hoped to get a few feelers about whether to look closer into one of those technologies, as mentioned i an only a humble hobbyist and would like to broaden my horizon, my biggest problem is time, I'm a full time taxidriver, husband, and father to two beautiful children that i love above all. So when it comes to my hobby I try not to waste time. So I hope some of you can help me shed some light on what is more a next step after mastering (cough) avr's

CPLDs and FPGAs are very, very similar; for many tasks they're interchangeable.  The difference is complexity.  CPLDs are for simple tasks, they don't have the resources to handle large, complicated jobs.  On the flip side, they're cheap and SUPER easy to implement on your board.  They're non-volatile, which means no flash memory is needed.  Just give them power and a clock and you're done.  Since CPLDs are relatively simple and don't have a lot of resources, they generally come in simple packages as well (eg: QFP), which makes board layout and fanout easy.

FPGAs are for designs that can't use CPLDs.  The CPLD code is generally reusable, just remap the pins, synthesize it for your new device, and you're done (that won't necessarily work the other direction though).  FPGAs have a LOT more resources than CPLDs do.  They often have block RAM built in, orders of magnitude more logic gates, dedicated interfaces for external RAM, etc.  They're also generally in much bigger packages, usually BGA with hundreds of pins.  This makes them more difficult to use in hobby applications.  You need more layers to get all of those pins out from under the BGA, you need tighter tolerances to squeeze vias in under the chip, etc.  Hobby PCB fab sites might not be able to do it, or the price may be much higher than you're used to due to the tolerances and layers required.  Even once you get the PCB made, you still have to populate it, which means solder stencils, paste, reflow oven, etc.  Most FPGAs are volatile as well, which means you'll need to add external flash to store the design.

In short, FPGAs are MUCH more flexible and MUCH more powerful than CPLDs, which can be very nice.  Rather than spending half your time in HDL just trying to re-write and optimize your code so it can fit on the CPLD, you can just slap it on an FPGA and be done with gobs of room to spare.  The tradeoff is they're generally much more difficult to design a board for due to the number of pins and package options, and populating that board can also be a pain.

If your design can use a CPLD (vs an FPGA), it probably should, but not all designs can fit on a CPLD.

If you want to buy a demo board to explore the world of HDL, you should get an FPGA.  The added room will give you a lot more flexibility in what kinds of designs you can implement.  Once you go to make a device to do a specific task though, you should at least explore whether or not your design will fit on a CPLD.  If it can, then it would simplify your life greatly.

[hneve]

IMHO the difficulty goes like this PSoC < CPLD < FPGA. This is because there is almost a complete drag & drop IDE for PSoC, and CPLDs are simpler and have more deterministic timing that FPGAs.

On the other hand I think right now the border between CPLDs and FPGAs is pretty blur.

Sent from my HTC One M8s using Tapatalk

yes i can belive that the border between cpld and fpga is blurred as i got somewhere some altera cpld is really a fpga in disguize but thats off the pinot , and thats maybe where my process of thought got muddled up.

as i understand fpga and cpld are pure digital, where psoc have analog capabilities.. (am i correct ?)
I saw a quick video of a psoc demo and get the drag&drop ide, it might be a bit awkward to get used to. At the moment im leaning towards psoc.

@suicidaleggroll:  That was exactly what I was unsure about regarding the difference between cpld and fpga. I understand that getting a fpga dev board is like getting a big enough bucket just in case, as should i make a project out of it I might be able to exchange it for a cheaper cpld. (could i say its like the difference between a atmega328 and a attiny28 ?)

[tggzzz]

check out XMOS XCore, they make 8/16 core 500/1000MIPS chips for low level hard realtime GPIO manipulation. Power of fpga with ease of microcontroller programming.

For some applications, yes. For many applications, no they can't replace FPGAs

XMOS excells at hard-realtime operation - the IDE tells you exactly how many cycles each operation, loop, function will take. So think of them, for they are a wide family available at DigiKey, as being realtime processors in the way that anything with a cache isn't.

I'm itching to find a project to use them, and my local HackSpace has just been give a couple of cheap devboards - thanks XMOS!

[suicidaleggroll]

(could i say its like the difference between a atmega328 and a attiny28 ?)

Yeah kind of.

[Fsck]

IMHO the difficulty goes like this PSoC < CPLD < FPGA. This is because there is almost a complete drag & drop IDE for PSoC, and CPLDs are simpler and have more deterministic timing that FPGAs.

On the other hand I think right now the border between CPLDs and FPGAs is pretty blur.

Sent from my HTC One M8s using Tapatalk

yes i can belive that the border between cpld and fpga is blurred as i got somewhere some altera cpld is really a fpga in disguize but thats off the pinot , and thats maybe where my process of thought got muddled up.

as i understand fpga and cpld are pure digital, where psoc have analog capabilities.. (am i correct ?)
I saw a quick video of a psoc demo and get the drag&drop ide, it might be a bit awkward to get used to. At the moment im leaning towards psoc.

@suicidaleggroll:  That was exactly what I was unsure about regarding the difference between cpld and fpga. I understand that getting a fpga dev board is like getting a big enough bucket just in case, as should i make a project out of it I might be able to exchange it for a cheaper cpld. (could i say its like the difference between a atmega328 and a attiny28 ?)

correct. psoc is a microcontroller with configurable analog parts. it's pretty unique and can easily simplify your designs. however, the analog components of the psoc are usually limited so if you need very specific specs, you probably won't find them.

[tggzzz]

as i understand fpga and cpld are pure digital, where psoc have analog capabilities.. (am i correct ?)

Sort of - PSoC is a bit of a marketing term with different manufacturers having different definitions. In one definition, PSoCs are essentially processors plus programmable logic in the same IC. They may or may not have some analogue capability.

Xilinx Zynq devices are one example of a PSoC, and with external ADCs they are used in the Red Pitaya semi-sort-of-open-source programmable oscilloscope.

If you have an FPGA then is it perfectly possible to create your own processor from scratch in the programmable logic. All the manufacturers have their own range of such "softcore" processors, there are some open-source ones, and some which imitate old processors such as 6502 etc.

[jancumps]

...this wasn't exactly the discussion i was hoping for, I hoped to get a few feelers about whether to look closer into one of those technologies, as mentioned i an only a humble hobbyist and would like to broaden my horizon, my biggest problem is time, I'm a full time taxidriver, husband, and father to two beautiful children that i love above all. So when it comes to my hobby I try not to waste time. So I hope some of you can help me shed some light on what is more a next step after mastering (cough) avr's

For me personally, understanding FPGA and VHDL was the biggest brain challenge. If you're looking for a challenge where you have to learn a new paradigm, the FPGA/CPLD road is worth trying.

Hamster, a member here on EEVblog forums, has written a nice tutorial. I'm using that together with a Papilio FPGA board.
Xess - from Dave Vandenbout - also has nice kits to get you started.

[bingo600]

To get started cheap

I have bought these

CPLD
http://www.ebay.com/itm/271159389579

FPGA
http://www.ebay.com/itm/400630255386

Programmer
http://www.ebay.com/itm/161597061343

But you'd have to do your own leds, etc ...
I have had much need for my Oscilloscope and a cheap Saleae logicanalyzer.

/Bingo

I also have a Spartan3E starterboard , but uses the Alteras more

[poorchava]

Right now Altera is bringing to market MAX10 series which unlike other MAX devices is and FPGA, not a CPLD, but is non-volatile (or rather volatile with on board flash) and has integrated ADC (similar specs to what you'd expect to find in a microcontroller - 12bit, 1Msps)

Sent from my HTC One M8s using Tapatalk

[mikeselectricstuff]

Pretty much the only reason to use a CPLD is to save cost in production where the functionality is simple. It is extremely easy to burst the capacity of a CPLD, and you sometimes need to get quite creative to fit things into the smaller devices.
For learning, use an FPGA (on a devboard) . You can ignore all the fancy stuff in FPGAs & start simple.

If you're doing something with a view to putting it on your own board, I'd reccommend looking at Lattice XO2, s it has a lot of the fiddly oddments built in - flash, voltage regs, and even a (not super accurate) oscillator. Lattice also do very cheap bare-bones breakout boards.
The range covers low-end simple devices up to bigger devices with block RAM and PLLs etc.

[miguelvp]

As much as I love PSoC, and how capable it is, it's a pretty unique environment, sure you can use Verilog or VHDL but most of the times you just use the components they offer and it will take you a while until you need a custom component that would require HDL.

Other limitations are that it only has one single PLL although you can create other frequencies by using frequency dividers.

As for FPGAs/CPLDs it's really not too difficult either, and it doesn't require you to learn VHDL or Verilog, or at least not much if you can work on schematic form, here is a simple tutorial on someone's question on how to make his logic gates work properly because his inputs where pulled high so pressing them was actually a 0 input when he expected a 1 (VCC)

https://www.eevblog.com/forum/microcontrollers/bemicro-cv-questions/msg524041/#msg524041

But a PSoC is still pretty capable as well to deal with a lot of tasks:
https://www.eevblog.com/forum/projects/make-use-of-an-old-cga-monitor/45/

of course one of my favourite links for PSoC (this relates to the PSoC 4 Pioneer kit) but their new PSoC 5LP prototype board can do so much more.
http://www.element14.com/community/thread/23736/l/100-projects-in-100-days?displayFullThread=true

Link to the PSoC 5LP prototype board
http://www.cypress.com/?rid=108038

But the problem is that even if all the examples can be ported, you just can't just do that from the get go, so going that route might require you to get a pioneer kit (no DMA and less resources) to get your feet wet.

Same goes with the BeMicro CV or the BeMicro MAX10, they are inexpensive but not too many examples:
http://www.alterawiki.com/wiki/BeMicro_Max_10

But Altera has a lot of free training videos but it will require a lot of ramp-up.

On the Xilinx front you could use the Papilio Pro or the newer Papilio Duo
http://papilio.cc/

But of course the older Pro has more examples than the Duo.
http://papilio.cc/index.php?n=Papilio.Learning
Including forum member hamster_nz "Intro to Spartan FPGA eBook"
http://forum.gadgetfactory.net/index.php?/page/articles.html/_/papilio/logicstart-megawing/intro-to-spartan-fpga-ebook-r34
(Btw, I shouldn't ask, but if you read this, is the new one going to happen or work took over that?)

So at the end it's pretty much what has more examples and available training to facilitate the ramp up.

Also it has to do on what you want to do, I bet the other suggestions are as good, you just have to jump into one and allow yourself time to get up to speed. But having sample code always helps to learn, although sometimes it doesn't because you just use the stuff without looking on why it works.

Last, Altera/Terasic has a new DE0-Nano_SoC, that has a dual core ARM Cortex A9. I have one but have not had time to dig into it. But it's way harder to use than the PSoC.

One thing that can be frustrating with Altera is getting a good understanding of their Avalon interconnect since most of their IP (intellectual property) components rely on that master slave, and their samples used the NIOS soft core and it acted as a black box. Maybe the new one with the ARM processor is easier to start with but it will require at least 4 months totally dedicated to it. That is needed if you want to access external components that need some initialization and even if the component would do it for you, it's tied to their proprietary IPs with no source to know how to use it in a different way.

Again, you have to define what you want to do, I think the PSoC is faster to learn and get going, but that doesn't prepare you much to graduate to CPLDs and FPGAs.

The Papilio is a cool concept and it does makes things a bit easy without the intricacies of Xilinx's ISE since it hides a lot from you.

Never used Lattice but I've seen what Mike can do with it so I bet it's a great starting point as well.

Another point will be that you might make a mistake wiring things and break the dev board (knock on wood since all of mine are still functional)

It's cool that there are so many choices but I can see why it can be frustrating, I have about 17 HDL capable dev boards, most of the PSoC but one Xilinx (papilio duo) and 8 Altera ones including one MAX 10 that it's borderline FPGA/CPLD.

Of all of them the PSoC takes the less space on installation. So the toolchain is another consideration.

My favorite go to, is still the original DE0-Nano (have two of them) but it's a bit spartan but has a lot of GPIOs, but the BeMicro MAX 10 is just $30 and the PSoC 5LP prototyping board is $10, $25 for the Pioneer and $4 for the PSoC 4 prototyping kit.

I wouldn't use the PSoC for anything higher than 40MHz or anything that needs a lot of different clocks that can't be derived from a single PLL.