ATmega4809 self triggering pin interrupts

[Simon]

I am playing with the ATmega4809 development board.

I am just trying to see that I can setup an interrupt. So I have an interrupt enabled on PA0 and every time it triggers it pulses PA1 output.

But it either triggers on it's own at 89KHz or connecting and disconnecting the waveform generator starts it off.

I don't get it, the sig gen is set for 400Hz where is 89KHz coming from?

Code: [Select]


ISR( PORTA_PORT_vect){
PORTA.OUTSET = ( 0x1 << 1 );
PORTA.OUTCLR = ( 0x1 << 1 );
}

int main(void)
{

//TCB0
TCB0.CTRLB = 0x5; // Set counter mode to input capture frequency and pulse width measurement
TCB0.INTCTRL = 0x1; // Enable capture compare interrupt

// I/O setup
PORTA.DIRCLR = 0x1 << 0; // make PA0 INPUT
PORTA.DIRSET = 0x1 << 1; // make PA1 OUTPUT
PORTA.DIRSET = 0x1 << 7; // Make PA4 OUTPUT

PORTA.PIN0CTRL = (0x1 << 0) | (0x1 << 3); // Setup PA0 with interrupt enabled on both edges and pull up enabled

sei(); // Turn global interrupts on.
TCB0.CTRLA = 0x1; // Enable the counter (connects the counter to the clock source)

    /* Application code */
    while (1)
    {

}
}

I was trying to setup TCB0 to read PWM which is why there is some TCB0 there.

[ataradov]

You need to clear the flags by writing 1 onto the corresponding bits of the INTFLAGS register. You need to do this in the ISR handler.

An interrupt request is generated when the corresponding interrupt source is enabled and the Interrupt
Flag is set. The interrupt request remains active until the Interrupt Flag is cleared. See the peripheral's
INTFLAGS register for details on how to clear Interrupt Flags.

[Simon]

Ah right, yes I found that out eventually. All working now but I still don't understand ho i was getting that apparent functionality

[ataradov]

Your interrupt handler was exiting and entering again, since the flag is still set. On a plus side now you know your absolute maximum interrupt rate

[Simon]

Oh i see it was leaving the interrupt routine but then found an interrupt condition again. Well yes that is 89.2KHz at 3.3333MHz CPU clock.

[cv007]

Also a nice to know item- after a RETI one instruction is always executed before any pending interrupt. So your original code (without clearing the flag) would return to the main empty loop, then back to the isr.

Put pin toggle code in the main loop, leave out the flag clearing in the isr, and you will still see the pin toggle from the main loop. Put a normal delay between the toggle and you will see a major slowdown of the toggle.

Which means you can still see the effects of main code running at a snails pace when you forget to clear an irq flag.