Author Topic: Chisel/Scala hardware description language: why?  (Read 2510 times)

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Online legacy

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Chisel/Scala hardware description language: why?
« on: December 31, 2018, 12:45:10 am »
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RISCV CPU written in the Chisel/Scala hardware description language
(written here, at lowrisc dot org)

I see a few projects are using Chisel/Scala instead of VHDL/Verilog: why?

I have no tools here supporting Chisel/Scala HDL, therefore, before taking it into consideration, I'd like to understand if it gives really good points.
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Offline obiwanjacobi

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Re: Chisel/Scala hardware description language: why?
« Reply #1 on: December 31, 2018, 01:02:33 am »
Both from Berkeley?   :-//

Online legacy

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Re: Chisel/Scala hardware description language: why?
« Reply #2 on: December 31, 2018, 02:13:19 am »
so it seems ... a Berkeley idea for supporting RISCV  :-//
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Offline brucehoult

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Re: Chisel/Scala hardware description language: why?
« Reply #3 on: December 31, 2018, 07:43:36 am »
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RISCV CPU written in the Chisel/Scala hardware description language
(written here, at lowrisc dot org)

I see a few projects are using Chisel/Scala instead of VHDL/Verilog: why?

Exactly the same reason you might write a program in C instead of in assembly language.
 

Offline brucehoult

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Re: Chisel/Scala hardware description language: why?
« Reply #4 on: December 31, 2018, 07:49:13 am »
so it seems ... a Berkeley idea for supporting RISCV  :-//

Chisel is independent of RISC-V.

Many RISC-V CPUs from outside of Berkeley (or outside the SF Bay area) don't use Chisel.

Many things that aren't RISC-V CPUs do use Chisel. It's just a high level way to flexibly generate Verilog, just as C is a high level way to generate assembly language. In the end, you get gates (machine code) at the end of the process.

Chisel isn't the only recent high-level hardware description language. SpinalHDL is better, and was inspired by Chisel but fixes a lot of perceived problems, and is also built on Scala (which is built on Java).
 

Offline ataradov

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Re: Chisel/Scala hardware description language: why?
« Reply #5 on: December 31, 2018, 08:18:45 am »
Berkeley is a research institution. They need to try new things, otherwise nobody else will.

I'm not a huge fan of it, but realistically only because it is not very wide spread. But it will never be wide spread unless someone is pushing it.

Thankfully there are a lot of other implementations out there in every language imaginable.
Alex
 

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Re: Chisel/Scala hardware description language: why?
« Reply #6 on: December 31, 2018, 08:38:53 am »
Exactly the same reason you might write a program in C instead of in assembly language.

Well, NO!

Talking about my paid jobs, VHDL is *THE* language to design HDL stuff, and I have collected a lot of job-experiences for this, as well as professional tools for this.

Now RISCV appears and when you look at the code, a lot of projects come written in another HDL language for which I have to start from the beginning.

It's not like Assembly vs C, it's a matter of reasons and purpose. Now, or this new language has valid points, or I will avoid spending my time (and probably money) on it.
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Offline ataradov

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Re: Chisel/Scala hardware description language: why?
« Reply #7 on: December 31, 2018, 08:41:06 am »
VHDL is *THE* language to design HDL stuff, and I have collected a lot of job-experiences for this, as well as professional tools for this.
You are again projecting your opinion. I use Verilog and collected a lot of tools for that. So I think that Verilog is THE language for HDL. Do you really not understand that different people have different preferences?

Also, horses are THE way for transportation.

Alex
 
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Offline ataradov

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Re: Chisel/Scala hardware description language: why?
« Reply #8 on: December 31, 2018, 08:47:50 am »
Obviously nothing new will be the best choice for real work at first. But you will never get anything new, if you don't try to make new stuff.

I like the recent explosion in programming languages. Some of them got the right ideas, others will be forgotten.

Right now, I would not waste time trying learn Chisel beyond idle curiosity.  But I'm glad that Berkeley spends their time moving that thing forward.
Alex
 

Offline ataradov

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Re: Chisel/Scala hardware description language: why?
« Reply #9 on: December 31, 2018, 08:49:15 am »
There is not need for gigantic fonts.

Paid jobs will always be using the old tools, of course. But the question "why you need new stuff then", is invalid.
Alex
 

Offline brucehoult

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Re: Chisel/Scala hardware description language: why?
« Reply #10 on: December 31, 2018, 08:57:06 am »
There is not need for gigantic fonts.

Paid jobs will always be using the old tools, of course. But the question "why you need new stuff then", is invalid.

And at my paid job, Chisel is the old HDL that all the legacy hardware was designed with, and the question of the moment is whether SpinalHDL is enough better (it clearly is better) to be worth converting everything to .. or whether Chisel can reasonably be enhanced to match Spinal (probably).
 

Online mark03

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Re: Chisel/Scala hardware description language: why?
« Reply #11 on: December 31, 2018, 08:57:58 am »
It looks to me as though SpinalHDL is quite similar to the approach taken by MyHDL.  It's unfortunate, IMO, to see MyHDL languishing while the Chisel "language family" gets all the attention and improvement work due to RISCV.  MyHDL has the enormous advantage of being built on top of Python, so you can do your testbenches in Python too.  Imagine writing a bunch of DSP HDL and then using numpy/scipy for verification.  (This is probably where your models and simulations existed already.)  Who wants to do that in Scala?  Yuck.
 

Offline ataradov

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Re: Chisel/Scala hardware description language: why?
« Reply #12 on: December 31, 2018, 08:59:45 am »
To be fair SiFive is in a special position here.

I doubt there are any companies outside of academia that actually used Chisel for anything.
Alex
 

Offline NorthGuy

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Re: Chisel/Scala hardware description language: why?
« Reply #13 on: December 31, 2018, 09:35:35 am »
Also, horses are THE way for transportation.

No doubts about this. Every engine is rated in horse powers.
 
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Online legacy

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Re: Chisel/Scala hardware description language: why?
« Reply #14 on: January 01, 2019, 05:55:55 am »
Let's put the question in this terms: How useful would it be to learn Chisel HDL?
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Re: Chisel/Scala hardware description language: why?
« Reply #15 on: January 01, 2019, 05:58:35 am »
Interesting answers here

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Offline NorthGuy

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Re: Chisel/Scala hardware description language: why?
« Reply #16 on: January 01, 2019, 06:39:16 am »
I've never heard of Chisel before. I looked at their documentation. They claim the language is highly parameterized and layered. After about an hour looking at their examples I couldn't see why it is better parameterized and layered any more than VHDL. It looks very similar to VHDL and I wouldn't have any problem re-writing their examples with VHDL. Most likely this can be done in Verilog as well. The syntax may be slightly better, but I haven't found anything dramatically better. It would be nice if someone could post a comparison between Chisel and VHDL (or Chisel and Verilog) and show where Chisel comes ahead.

Their white paper doesn't provide any specific details. They post an example where you can build a cache module just in few lines of the code (looks like the cache builder is the part of the language). But I don't see how it is different as using externally developed cache module.
 

Offline asmi

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Re: Chisel/Scala hardware description language: why?
« Reply #17 on: January 01, 2019, 06:50:30 am »
IMHO Chisel is a typical product of academia where people tend to be more interested in the process as opposed to result.
 

Offline ataradov

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Re: Chisel/Scala hardware description language: why?
« Reply #18 on: January 01, 2019, 06:52:13 am »
From what I've seen none of the new languages are any better than VHDL/Verilog. They all seem to be "VHDL but in <insert your favorite programming language>".

Hopefully something more interesting comes along soon.
Alex
 

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Re: Chisel/Scala hardware description language: why?
« Reply #19 on: January 01, 2019, 06:53:19 am »
IMHO Chisel is a typical product of academia where people tend to be more interested in the process as opposed to result.

precisely my doubt ...
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Offline james_s

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Re: Chisel/Scala hardware description language: why?
« Reply #20 on: January 01, 2019, 09:43:41 am »
IMHO there is already enough fragmentation between VHDL and Verilog, two different languages with virtually identical capabilities. The last thing we need is *another* HDL, unless it brings to the table something very unique.
 

Online coppice

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Re: Chisel/Scala hardware description language: why?
« Reply #21 on: January 01, 2019, 10:10:25 am »
VHDL is *THE* language to design HDL stuff
Except when Verilog is flavour of the month.  :)
 

Offline james_s

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Re: Chisel/Scala hardware description language: why?
« Reply #22 on: January 01, 2019, 10:22:45 am »
It seems VHDL is the defacto standard in Europe while Verilog is more common in the US. I found there to be far more hobbyist support in VHDL so that's the language I went with. Overall I'd say there is no clear winner.
 

Offline asmi

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Re: Chisel/Scala hardware description language: why?
« Reply #23 on: January 01, 2019, 11:36:37 am »
Overall I'd say there is no clear winner.
Of course there is - it's SystemVerilog! :P

Let the flame war begin! :box:
 

Offline obiwanjacobi

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Re: Chisel/Scala hardware description language: why?
« Reply #24 on: January 01, 2019, 06:13:49 pm »
I find VHDL to be aweful. I find it is endlessly verbose and that is what I think Chisel aims to remedy. I looks (from a great distance) to be a more abstract language. Usually learning the syntax of a new language is not the problem. It is learning the paradigm and mindset (and their libraries and tools) that take real time. Ultimately the goal is to be more productive.

I did some (hobbyist) VHDL but my next project will indeed be in System Verilog. To me that looks like the best blend of abstraction, conciseness and readability. Not perfect but the best we have - not looked at other languages due to lack of knowledge of their existence and sometime lack of available tools.


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