CLPD / FPGA Square wave frequency generator.

[CM800]

Hi All,

So, I've been playing with my CPLD and I've decided I want to get it controlling a Pulse / Direction stepper motor driver I have (6400pulses per revolution)

Now, the first part of this is creating some form of variable frequency control... I am honestly quite stuck with this, my main clock is 50MHz, now, I want to be able to be able to vary my output between about 1kHz to 320kHz (wider then that if possible)

What would be the best way to do this?

[awallin]

DDS with a 1-bit DAC at the output?

If you want to do positioning (CNC, 3D printer, etc) with the stepper motor then the problem is much harder (you need a trajectory generator) and has already been solved many times, see e.g. linuxcnc.

[kc8apf]

Make a counter that increments from the 50MHz click.  Have a separate register to hold a compare value.  When the counter matches the compare, reset the counter and toggle the output signal. 

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[dgtl]

Just for square wave generation, use a phase accumulator counter. A configurable value gets added to the accumulator every cycle of the 50MHz. In case of square wave, your output is just the most significant bit of the accumulator. The accumulator will wrap over and everything continues; at the same time the remainder of the phase is still kept and you'll get fractional precision. Scale the accumulator size as needed; it shall be at least 16 bits to accomodate divisor 50000; it may be as long as much precision you'll need. In case of 50MHz input and 16-bit accumulator, each configuration step is 762.9Hz. For 32-bit, you'll get 0.01Hz.
As always with fractional division, the pulse lengths might not be exactly equal; for example, the input of 419 will give you average frequency of 319.7MHz, but there will be pulses of 156 input clocks and 157 input clocks due to output not being multiple of input frequency.
As said, driving stepper motors at not very slow speeds is much more than just fixed frequency pulse generation. For better results, explore what has been done before.

[andre_teprom]

In the case of the frequency vary in a range so broad like that ( > 300x ), you should consider splitting the calculation routine among scalable updating rates.

[Kalvin]

+1 for the phase accumulator. Very simple to implement and the easiest way to create fractional output frequencies.

There are also some PIC-processors with an internal NCO which may be used for frequency generation up to 30MHz:
http://www.microchip.com/pagehandler/en-us/family/8bit/peripherals/coreindependent/nco-prdpge.html