The transceivers allow high speed Current Mode Logic, Altera has it's own flexible flavor called Pseudo Current Mode Logic that is based on CML.
On another note, the HSMC connector has a lot of LVDS (Low Voltage Differential Signaling) pins for high speed communications over twisted pair cables to drive an lcd panel directly for example. Provided that you know how the connector is setup and you can supply the voltages and differential pairs for data and clocks.
About the training on the Terasic site, the myfirstFPGA and myfirstNios instructional videos use Quartus II 9.1 (very old since they are now on version 13.1) and they use the SOPC builder (obsoleted) now relegated by Qsys, so the Nios sample (and that applies to any usage of the provided intellectual property libraries that you can setup), is slightly different than the usage of the SOPC system. But Altera University has some samples on how to use Qsys and how to hook up the extra logical connections. Even if you don't use the Nios soft core, if you need to configure the PLL to give you a different frequency you have to use Qsys, so it's important.
But since all FPGA dev boards are different and suit different needs, I would still recommend to download all the user manuals and compare them and see what do you need.
All of them have sample code, but some manuals actually tell you how to go from beginning to end on creating a project. the othere just show you how to run a batch file to load and run the sof configuration file, that doesn't teach you how to create your own configuration.
Again, even if you decide to get one that doesn't have the step by step, the old videos on the training or the DE0-Nano user manual have the step by step instructions from beginning to end.
There is a lot this chips can do, just the input/output configuration options alone are incredible, do you need to interface to 3.3V on one pin and 1.2 on another? internal pull up/down configuration, TTL/CMOS/PCI/PCI-X? all configurable(varies depending on your chip, so download the datasheet too). LVDS pairs interfering with other pairs? you can move them to farther pins, it's all configurable.
The supplied samples won't go there, but go to altera's training links, lot's of info there:
http://www.altera.com/education/demonstrations/online/design-software/onl-design-software-demos.htmlhttp://www.altera.com/education/univ/software/unv-software.htmlWhatever you decide to get, just get one and play with it. They are amazing chips!.
My take is the simpler the less distractions and frustrations. I wouldn't give my daughter an Aston Martin to learn how to drive.