DMA, memory to peripheral

[luiHS]

 
I reviewed the Data Sheet and the Reference Manual to identify the available GPIO for RT1020 LQFP100, which is the current available, so with fewer GPIO ports than the LQFP144.

I see some strange thoughts, some IO ports are not available, but the problem is that they are not contiguous.

I attach images of the assignment of GPIO1, GPIO2 and GPIO3. Those that I have marked in red, are not available in the LQFP100. I see that for each GPIO there are only 16 available ports, that is 2 bytes, but they are not contiguous, there are gaps between them.

For example for GPIO1, the first available port is GPIO1_6 (instead of GPIO1_0), then it continues until 15, and there is a gap without ports until 26.

The question is that if I connect, for example, the first 8 ports available in GPIO1 by DMA, these are considered the 1st byte, and the next 8 ports would be the second byte?

Byte 1
GPIO1_6
GPIO1_7
GPIO1_8
GPIO1_9
GPIO1_10
GPIO1_11
GPIO1_12
GPIO1_13

Byte 2
GPIO1_14
GPIO1_15
GPIO1_26
GPIO1_27
GPIO1_28
GPIO1_29
GPIO1_30
GPIO1_31

[ataradov]

The question is that if I connect, for example, the first 8 ports available in GPIO1 by DMA, these are considered the 1st byte, and the next 8 ports would be the second byte?

DMA controller won't be able to do anything with this.

You need to evaluate if Smart External Memory Controller (SEMC) will work for you. I still don't see the full picture of what you are doing, but it sounds like "8080 display frame buffer" mode is what you need.

[Siwastaja]

You need to get your basic terminology right before you have any chance understanding the documentation.

A PORT is the collection of the bits.

You don't have "first 8 ports available in GPIO1".

GPIO1 is the port.

[luiHS]

You need to get your basic terminology right before you have any chance understanding the documentation.

A PORT is the collection of the bits.

You don't have "first 8 ports available in GPIO1".

GPIO1 is the port.

I understand the concept, it is only a question of nomenclature when expressing it. A port is, for example, GPIO1, and each pin is a bit of the port, so if there are 16 input/output pins in GPIO1, each one is a bit of the port and I can read or write by DMA one or several bytes, not necessarily from the first byte, but always full bytes.

My question was about the grouping and order of the bits, in this particular case, since on the Reference Manual and the Datasheet, in the ports there are gaps between bits (for LQFP100), they are not contiguous (in appearance). Probably, internally, all these bits are contiguous , and it is not a problem, in fact when counting them I see that there are 16 bits per port, that is 2 bytes, instead of the 4 bytes that should be for the LQFP144. I will do tests, and I will check with the oscilloscope to corroborate what I suspect (internally all those bits are contiguous, although in the manual there seem to be gaps between them)

Knowing that, and that I can read or write in one of those bytes, although it is not the first one, I'm already clear about it. In my hardware, for the tests, I will have to reorder the routing of the pins of each port, to always catch bits that are part of the same port byte. At first I mixed bits of several ports and without order, for lack of information, I thought that each pin could be treated individually.

Now I am with the tests, but I am already understanding the concepts necessary to handle the DMA, especially with parallel read / write, to or from the GPIO ports. I still have to check how to configure automatically to increase the address of origin or detiny and how the circular buffer works, I have the concepts, but I lack the practice to be able to configure everything.