Author Topic: Early design review: MCU with Quad SPI and External Memory Interface.  (Read 9525 times)

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Offline obiwanjacobiTopic starter

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Re: Early design review: MCU with Quad SPI and External Memory Interface.
« Reply #25 on: February 06, 2017, 06:57:01 am »
Hm. No Idea gow godd this is but.. https://olimex.wordpress.com/2012/06/12/low-cost-lcd-to-vga-adapter/

So you're suggesting I should choose a bigger MCU that has a TFT port and convert back to VGA...?
Sounds suboptimal to me. Can you explain your reasoning?

There is no maximum clock cycle time specified. 133MHz is the maximum frequency for the part for certain operating conditions.
Exactly, I've used SDRAM with 50MHz clock and it was perfectly fine.
Thanx for the confirmation.
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Offline obiwanjacobiTopic starter

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Re: Early design review: MCU with Quad SPI and External Memory Interface.
« Reply #26 on: February 09, 2017, 09:54:14 am »
Just discovered that the STM32F446 has 5V tollerant IO. So I probably won't even need to level-shift explicitly between the system-interface and the MCU. Have not discovered how that works specifically, but then I just began reading the docs.

I started on a schematic and had fun creating the 144 pin MCU in KiCad as a library part as well as the SDRAM part. I have used the schematic of the STM32F429 DISCO board as a guide on how to connect the SDRAM to the MCU.

I initially thought I would require the part with the most pins I could find, but perhaps I can use the smaller VE part in the final design. We'll see.
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