Well, if you want to avoid using an FPGA as a buffer, there are other ways to do a buffer - several smaller STM32s (or controller of your choice) should be able to act as a buffer, connect one or two output lines of the ADC per "buffer", CLKOUT as parallel, using SPI Slave mode with DMA, some creative synchronization, connect them to the main processor as you see fit. Not an elegant solution, but it should work. Given how cheap these devices are, you could beat an FPGA.
Edit: Or a dedicated FIFO - there are such devices.
That said, at a few seconds record length, you will have a memory problem pretty soon. Or you can use the buffers to convert the signal to a faster interface that you can handle. khach's suggestions sounds great, if you could not use that directly, you could make an interface converter rather than a buffer.