If you think of the iCEcube as a means to get the code formatted for the chip then all you really need is to do one project and that'll be it.
Essentially:
Once you have your synthesised code open up iCEcube and click on "new project". It'll make a directory for it once you point it at wherever you want it to be (I usually put everything in a folder (Ver1 etc) and then the code is one folder higher up but its up to you.
Pick the device, package etc in the menu for new project and do "next"
Now pick your top level file (verilog in my case) and click the ">>" button so the file is added to the right hand side then click "finish"
Then you set the synthesiser tool by right clicking on "Synthesis tool" and set is to LSE.
Now you're good to go. Click "Run Synthesis" and given that your code has already been tested it'll synthesise ok.
There is then only one more stage - you have to tell it which connection (from your design) goes to which pin which is in the "pin constraints editor".
Do that and then run "Run P&R" and it'll do the rest.
You get a .bin file in the directory under your original folder "\sbt\outputs\bitmap\<filename.bin>" which is just a binary so I wrote a simple "bintoarray.exe" that converts it into a 'C' array so your micro can include it in its code - and then send it to the FPGA (so you don't need any tools).
I thought that was going to be a couple of lines - a true optimist!
If you use ISE (xilinx tools which I am happy to do because I used lots of their parts in the past) to do the checking and synthesis - so your code has been checked first - there isn't much in the way between that and running it.
You are right though, it could do with a video