FPGA as a counter/divider?

[rcbuck]

I had to step away from the project for a couple of days to handle other things. As additional information, the PIC32 I am using is a PIC32MX110F016.

This morning I modified the code so I am using the Output Comapare function of the PIC32. According to the data sheet, when the count in the Output Compare register matches the value in the Timer2/3 register pair, the OC output pin gets set with no cycle delay. I am using the Timer4/5 pair for the frequency counter input.

I put my programmer in debug mode and confirmed that is true. When the OC match occurs, I use the OC output pin to disconnect the 10 MHz signal from the counter input pin using a TS5A3159 analog switch. When I stop the program inside the OC interrupt routine, the TMR4 register contains 40,000,000 which is exactly one second. If I set Timer2/3 and OCR1 to 400,000,000, that is what I see in TMR4 register inside the OC interrupt. So there is in fact no cycle delay when the OCR1 count matches the PR4 value.

The counter has been running in the 10 second mode for a couple of hours and constantly displays 100,000,000. About once a minute I see a count of 99,999,999 due the input signal not being edge aligned with the start of the delay period. But that is no big deal.

All I need to do now is to find someone with a $10,000 HP or Tektronix 12 digit frequency counter who can tell me the exact frequency of my GPSDO. If I knew that, I could put my counter in a 1000 second count mode and see how it compares to the expensive counter.

[iMo]

..I use the OC output pin to disconnect the 10 MHz signal from the counter input pin using a TS5A3159 analog switch..

TS5A3159 is slow. Use a fast logic gate instead..

[NorthGuy]

When the OC match occurs, I use the OC output pin to disconnect the 10 MHz signal from the counter input pin using a TS5A3159 analog switch.

You can do it much simpler. Let the timer run from the external signal which you want to measure, and use an IC module to capture rising edges of external 1PPS signal from a GPS module. This gives you one count per second, which you simply sum up. This way you don't need any external circuitry, and don't even need GPSDO because GPSDO feeds of GPS pulses itself, and there's no need for anything else. The best part, you don't need $10K HP device for tests

[rcbuck]

TS5A3159 is slow

It can handle input signals to 100 MHz. My highest frequency will be 50 MHz. Its maximum switching time is rated at 50 nsec so it can probably handle the once per second switch toggle with no problem.

You can do it much simpler

The GPSDO will not be connected to the frequency counter. It will normally run off of the onboard TCXO. A couple of times per year I will connect the GPSDO 10 MHz signal to the counter to re-calibrate the TCXO.

[NorthGuy]

It can handle input signals to 100 MHz. My highest frequency will be 50 MHz. Its maximum switching time is rated at 50 nsec so it can probably handle the once per second switch toggle with no problem..

50 ns will fully contain 2 pulses at 50 MHz, potentially making your count 2 more or 2 less.

[rcbuck]

NorthGuy, you are correct. I hadn't done the math at 50 MHz. I guess I will replace the switch with something like a SN74LVC1G08. It has 1-5 ns switch time in a SOT-23 package.

[iMo]

You may think about following pic32 setup (a "reciprocal counter"):

1. rubidium to hw counter_ref  (32bit)  - ref_freq
2. OCXO to hw counter_sig (32bit)     - sig_freq

Both counters shall run continuously.

And do make a snapshot of both with a single edge. It could be it is somehow feasible.

You get counter_sig_old and counter_ref_old values.

Then, after some time (it must not be a precise interval, it could be any reasonable interval you want), do make a snapshot again.

You get counter_sig_new and counter_ref_new values.

From ((delta_sig*ref_freq) / delta_ref) you may get the measured sig_freq.

In case you would be able to measure the phase (in ns or ps) of the sig edge against the ref edge in the moment of sampling (when you do the snapshot) you may enhance the counter's resolution significantly (the "reciprocal counter with the time iterator"). Significantly means 1000x for example..