FPGA unleashed!?

[sasa]

That is slogan for Papilio, open-source HW and SW project to simplify FPGA design and C++ programming...

After almost decade playing with PICs and ATmega MCUs, it is time to change to the new platform...
Making personal custom chip with FPGA was fantastic idea, however expensive starting environment (including HW and SW) and complexity of designing and programming and many different FPGAs was quite barrier to a hobbyist.

I have visit papilio.cc quite by accident and was pleasantly surprised that such project exists after reading main web page.

Does anyone have concrete experience with or any similar project?

[stmdude]

FPGA development has gotten a lot cheaper the last few years. This is also the reason why I got into into it.

In total, I've spent $75 to get myself to a point where I can synthesize something that has a soft-core CPU and generates a HDMI signal.

The board I used was a "miniSpartan6+", which cost $75.  Xilinx ISE is free (if you pay, you can get access to more IPs).

Costs that you might not have taken into account is decently fast oscilloscope or logic analyzer, so you actually can _see_ what your board is doing (simulation will only get you so far).

[hamster_nz]

Costs that you might not have taken into account is decently fast oscilloscope or logic analyzer, so you actually can _see_ what your board is doing (simulation will only get you so far).

If you get an Altera or Xilinx 7-series board their virtual logic analyzers are included in the "free to use" tools - but they can only capture a few k of samples as they are limited by on-FPGA resource, so having a Saleae helps.

[jmelson]

If you get an Altera or Xilinx 7-series board their virtual logic analyzers are included in the "free to use" tools - but they can only capture a few k of samples as they are limited by on-FPGA resource, so having a Saleae helps.

Xilinx has ChipScope, same function and limitations.  Free for reasonably small FPGA parts as well.

Jon

[julian1]

The Lattice Ice40 fpga's architecture and bitstream format have been reverse-engineered and are now supported by FOSS.  yosys Verilog syntheisis + arachne place and route + icestorm for spi flash/ram programming.

Everything is apt-get installable on Debian. You get a complete Verilog based toolchain, good enough for soft-cores and which beats Lattice's own tools on several lut count and timing benchmarks.

[hamster_nz]

Oh, cool - I haven't updated Webpack in a long time.

Have a reason to do it now.

[legacy]

Xilinx has ChipScope, same function and limitations.  Free for reasonably small FPGA parts as well.

It's not free, the license lasts 1 year from registration, and it's node locked.
Also, you can't resell it. It's personal.

[rstofer]

If you get an Altera or Xilinx 7-series board their virtual logic analyzers are included in the "free to use" tools - but they can only capture a few k of samples as they are limited by on-FPGA resource, so having a Saleae helps.

Xilinx has ChipScope, same function and limitations.  Free for reasonably small FPGA parts as well.

Jon

But the trigger can be very specific, like start analyzing when a MULT instruction comes up in a CPU design.  This type of thing isn't always easy to capture with a Logic Analyzer.  Heck, you can just add any trigger condition you want, you have a barn full of logic to create it.

Definitely, Vivado.  I still like ISE but I'm about at the point where I will be using Vivado the vast majority of the time.

[Someone]

Xilinx has ChipScope, same function and limitations.  Free for reasonably small FPGA parts as well.

It's not free, the license lasts 1 year from registration, and it's node locked.
Also, you can't resell it. It's personal.

The ILA and analyser been included free in the web pack (free) releases of ISE and Vivado for some time now. When the web pack license ends you can continue using the tools fine or request another free license if it bothers you.

[jefflieu]

The big barriers of FPGA for Hobbyists are:
- cost of device: which has gone down but still higher than the cost of an embedded CPU.
- cost of tools associated with the FPGA and hardware:
+++ First, is the programming JTAG, the device from Xilinx and Altera is ridiculously expensive. Digilent and Terasic have made cheaper version but still in the range of one kit.
+++ Then the cost of the tools, FPGA prove to be useful in the range of above 50MHz. For this, you need to invest in some good scope as stmdude has mentioned.
- Learning curve of HDL design. For hardware you've got to know and do it right quite a lot of things to see some magic happens.

I've been thinking and doing some sort of project here.
https://github.com/jefflieu/recon
Although, it has different approach from the papilo, but still same goal: to make the path of moving to FPGA platform from PIC/Atmega easier.

The idea is to have a collection of pre-verified embedded systems (Most importantly, flash, SDRAM Memory interface timing) from simple to complex where people can start doing something fun on FPGA straight away. Then modify part of the system as they wish along the way. So the big chunk of the work of getting something up and running is done.

So far, not many people get excited about this project other than me
You're welcome to join, buy a board, create a system, verify it and upload it, all open source.

[legacy]

The ILA and analyser been included free in the web pack

Chipscope? no.
Bought a few kits, it's not like you say.
It lasts 1 year, then you have to pay.

[legacy]

where people can start doing something fun on FPGA

oh, god ... thought that we are already plenty of shit from opencores and fpga4fun.
It will rain against us like a flood

[Someone]

The ILA and analyser been included free in the web pack

Chipscope? no.
Bought a few kits, it's not like you say.
It lasts 1 year, then you have to pay.

That is the old licensing model which is no longer used for chipscope. If you install newer webpack licenses they include a node locked and permanent chipscope license, I checked this again to be sure and its right there in the license manager.

[brucehoult]

I have visit papilio.cc quite by accident and was pleasantly surprised that such project exists after reading main web page.

Oh, that's all very cool!

I see that page talks about their own soft CPU, the very simple stack-based "ZPU".

I already knew about a Papilio RISC-V soft cpu that has been made in the last year or so, but didn't know about the project as a while. The it seems that the RISC-V uses not many more LUTs than the ZPU, but will be masively faster (at the same ~100 MHz clock speed).

[legacy]

old licensing model

Yup, bought 2 years ago.
Good news at the end 

[rstofer]

If you buy the very cheapest development boards, you may need to invest in a way to program them.  If you spend a little more, the board may come with a USB -> JTAG programmer that will also serve as USB -> Serial.  Many of the newer Digilent boards have this feature.

Even the $99 Arty board comes with a lot of projects to get started:
https://reference.digilentinc.com/reference/programmable-logic/arty/start

Given Vivado and the Internal Logic Analyzer, the only other thing you need is a USB cable.  And some of the boards even come with that.

There are certainly cheaper boards but at some point, all the gadgets on the board will come in handy.