Author Topic: Having trouble with Lattice MachXO3L FPGA [SOLVED]  (Read 8119 times)

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Offline Tainer

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Having trouble with Lattice MachXO3L FPGA [SOLVED]
« on: July 06, 2015, 01:28:19 am »
I've recently bought MachXO3L starter kit.  When I was uploading my bitstream file I accidentally selected 'NVCM Erase,Program,Verify' in diamond programmer. So I've done 'NVCM Erase', tried programming SPI flash again but ended up with the following error:
Code: [Select]
INFO - Device1 LCMXO3L-6900C: LCMXO3L-6900C: Verify ID
ERROR - Verification Error...when Processing function: 'CHECK_ID'

After that I looked at the programming manual and read the following:
Quote
MachXO3L multi-time (up to two times) programmability through non-volatile technology (NVCM)
  :palm:

So basically I've already written to the nvcm twice. On the other hand, if I select 'SPI Flash Erase,Program,Verify' instead of 'SPI Flash Background Erase,Program,Verify' I can upload the bitstream file into the SPI flash without problems. Unfortunately, FPGA does absolutely nothing (8 leds are lit all the time). My guess is - it tries to read configuration from nvcm instead of external flash for some reason.

Is there a way to 'unbrick' this thing?

edit: I can confirm that by programming SRAM I can get the FPGA working, but obviously the configuration will be erased once I power cycle. I assume I need to find some way to tell it to boot from SPI flash instead of NVCM.
« Last Edit: January 19, 2016, 08:09:03 pm by Tainer »
 

Offline Macman

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Re: Having trouble with Lattice MachXO3L FPGA
« Reply #1 on: July 06, 2015, 09:50:05 am »
I don't have any experience with MachX03L myself but from what I understand you have to use the feature row editor to change the configuration bits so that it loads from SPI flash and then download the feature row to the FPGA. The feature row memory can be updated a maximum of eight times.
 

Offline Tainer

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Re: Having trouble with Lattice MachXO3L FPGA
« Reply #2 on: July 07, 2015, 12:53:26 am »
Thanks a lot, Macman. I've set BootSelect[2:1]  and MSPI_Persistent_Enable bits to 011 and now the FPGA boots properly.
Too bad the feature row can only be flashed a couple of times. I'd better be more careful with this GUI programming tool..
 

Offline ale500

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Re: Having trouble with Lattice MachXO3L FPGA
« Reply #3 on: July 11, 2015, 02:26:13 pm »
Just curious, have you used the MachXO2 devices ? Is there any differences between the two ? in paper they both seem pretty similar... does it compile for Machxo3 faster ?
 

Offline Tainer

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Re: Having trouble with Lattice MachXO3L FPGA
« Reply #4 on: July 13, 2015, 09:33:26 am »
Unfortunately I haven't used other Lattice devices (in fact this is my very first FPGA). Although I was intending to use this board for prototyping only and switch to XO2 in the final design, since XO3 is available in BGA packages only and I don't do BGA. Compile time seems reasonable. Flashing (via ftdi) does take a while - haven't noticed much difference between flash or sram upload.
 

Offline peepo

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Re: Having trouble with Lattice MachXO3L FPGA
« Reply #5 on: January 04, 2016, 07:15:30 pm »
I have related issue: ERROR - Verification Error...when Processing function: 'CHECK_ID'

however on MachXO3LF with ubuntu14.04

can anyone advise?
 

Offline joy586210

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Re: Having trouble with Lattice MachXO3L FPGA
« Reply #6 on: January 19, 2016, 03:29:53 am »
Many thanks, it solved my issue.
Now I can boot from external spi flash with my machxo3l now!
It seems that nowhere to get details about feature row!
 

Offline helge

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Re: Having trouble with Lattice MachXO3L FPGA
« Reply #7 on: January 19, 2016, 10:30:18 am »
Feature Row is part of the system configuration and programming and documented here (p.8 and below):

http://www.latticesemi.com/~/media/LatticeSemi/Documents/ApplicationNotes/MO/MachXO3ProgrammingandConfigurationUsageGuide.pdf?document_id=50123

Quote
It is strongly recommended that the Feature Row only be modified during development, and rarely, if ever,
upgraded in the field. The reason for this recommendation is the Feature Row is responsible for controlling the
availability of the Configuration Ports. It is possible to cause active Configuration Ports to become unavailable, preventing
future updates.
Changing the Feature Row can also prevent the MachXO3L/LF from configuring. The PROGRAMN, INITN, and
DONE control and status pins are enabled and disabled using the Feature Row. The PROGRAMN input pin may be
recovered for use as a general purpose I/O. Erasing Feature Row state causes the PROGRAMN input to act as
PROGRAMN, not as a general purpose I/O. If the general purpose I/O is driven active low the MachXO3L will never
be allowed to complete its configuration process.
Feature Row can be erased or altered by Diamond Programmer under Advanced Security Keys Programming.
Feature Row settings can be altered using the Diamond Spreadsheet View. Spreadsheet View allows you to edit
the configuration settings for the MachXO3L/LF, and then saves your settings in the Lattice Preference File (LPF).
These settings are applied to the MachXO3L/LF configuration data during the Map, Place, and Route build phases.

I stumbled upon the FeatureRow structure when I implemented SPI, see

http://www.eevblog.com/forum/microcontrollers/machxo3-sn-pin-i-think-i'm-screwed/
The SN pin (for programming only or available for GPIO when you disable EFB SPI altogether, d'oh!) trolled me pretty good.
« Last Edit: January 19, 2016, 10:32:59 am by helge »
 

Offline joy586210

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Re: Having trouble with Lattice MachXO3L FPGA
« Reply #8 on: January 19, 2016, 04:58:32 pm »
Thanks helge for your quick response, you are so nice!

Maybe TN1279 on my hand is not the latest version!! It's ver 1.4 :palm:
But the latest is ver 1.6!
« Last Edit: January 19, 2016, 10:29:54 pm by joy586210 »
 

Offline gfrans

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Re: Having trouble with Lattice MachXO3L FPGA [SOLVED]
« Reply #9 on: March 19, 2016, 04:30:15 pm »
I registered just to say "thanks" to everyone that posted in this thread (if anyone is listening); I was bashing my head against the same problem for days!

This is also my first Lattice product, and it's a little frustrating that this model-specific feature is not mentioned at all in the quick-start guide for the breakout board I purchased.  I'm not even sure how I managed to overwrite the feature row in the first place.

Anyway, cheers!
 

Offline dal3boy

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Re: Having trouble with Lattice MachXO3L FPGA [SOLVED]
« Reply #10 on: March 22, 2016, 01:29:43 pm »
Hi all

As I'm new to FPGA, got MachXO3 board and now have same issue, as I'm new to this world and don't want brick my board
Can someone guide me to solve this, I'm on Ubuntu 14.04 and Diamond 3.7

Please help me with this configurator/setting as I don't fully understand what have to do to make it working

Thanks
 

Offline vignesh_shan

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Re: Having trouble with Lattice MachXO3L FPGA [SOLVED]
« Reply #11 on: October 16, 2018, 10:02:34 pm »
Hi,
In Machxo3l (MachXO3 Programming and Configuration Usage Guide), There says
"MachXO3L multi-time (up to nine times) programmability through non-volatile technology (NVCM)". Is it but in some websites(link: https://huiminee.wordpress.com/2016/10/03/boot-select-feature-row-spi-external-flash/ ) and older documents there says nvcm is two times programmable.  which one is correct ?? Is any one worked on this ? pls advice if know.
 


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