Greetings,
Im tinkering with a 6502 computer, that i have working but i wanted to see if i could replace the logic ICS with a PLD, which for the most part was not problem(NAND and inverters), however i have 74HC74, that halves the clock of the system, and i simply cannot figure out how to implement some sort of divider or counter, that i can use to reduce the clock, the only tool i have available is wincupl.
I have looked at the examples, but as the features of different parts affect what you can do, i have a hard time figuring out how to crack this nut.
Below is the nonworking code, i basically dont know what im doing:) as soon i move past very basic logic.
Is it possible to implement a counter/divider that could halve my clock input?
Name test ;
PartNo 00 ;
Date 12/13/2017 ;
Revision 01 ;
Designer Newbie ;
Company Lasse ;
Assembly None ;
Location ;
Device g22v10 ;
/* *************** INPUT PINS *********************/
PIN 1 = phi2 ;
PIN 2 = RW ;
PIN 3 = A14 ;
PIN 4 = A15 ;
PIN 5 = RWINVinput;
PIN 15 = R;
PIN 11 = S;
/* *************** OUTPUT PINS *********************/
PIN 19 = topaddressactivelow;
PIN 18 = outputenable;
PIN 17 = writeenable;
PIN 16 = rwinvoutput;
PIN 14 = Q;
rwinvoutput = !RW;
topaddressactivelow = !( A14 & A15);
outputenable = !( phi2 & RW );
writeenable = !( phi2 & RWINVinput);
Q.D = Q.AR;
Here is a picture of the device i want to use, mainly because i have it and it was cheap
https://photos.app.goo.gl/951yMkD2UiyEEvC03-lasse