Hey guys!
I just launched my new VHDL blog,
https://vhdlwhiz.com/.
I've always felt that the FPGA and VHDL community has a tendency to overly complicate things. Of course, if you're selling a service or an academic paper or something, you want to give the impression that you know stuff. But when it comes to learning, focusing on all the nitty gritty details kind of gets in your way.
Most people learn VHDL in a bottom-up kind of way. At Uni you first spend a year learning about the transistor, then a year learning about logic gates. And finally, you get to learn to create logic using VHDL or Verilog. This is how I learned VHDL. But if you're anything like me, you don't have the patience for this!
That's why I'm kicking off my blog by launching a top-down Basic VHDL Tutorials series.
Check out the free VHDL course:
https://vhdlwhiz.com/basic-vhdl-tutorials/Don't work harder than you have to!