Still nothing found to be intimidated forI thought I Jinxed myself with all the Fuss about BMI.
I needed to change from Debug (HAR - Halt After Reset) to Debug to get the thing to run standalone.
Note to self: Don't use HAR unless your application requires itI did BMI change like this (reconstruction)
#include <xmc_common.h>
#include <XMC1000_RomFunctionTable.h>
...
#define BMI_DEBUG_SWD0 0xF8C3
#define BMI_DEBUG_SWD1 0xFAC3
uint16_t write_bmi = 0; //Do not initialize write_bmi with anything but 0
//Program conditions to set write_bmi?
if(write_bmi){ //Set breakpoint here and set write_bmi if you want to program new BMI
//Place delay here to catch cathastropic flash-cycling in time.
_BmiInstallationReq(BMI_DEBUG_SWD0);
SCU_RESET->RSTCON = SCU_RESET_RSTCON_MRSTEN_Msk; //Master Reset
}
So.. It's really that simpleTarget started running the program without halt. Tried to launch debugger and it did. Nice
Took the target off from debugger probe for some testing and when I placed it back. Debugging didn't work anymore and first thing I thought I jinxed myself now.. BMI didn't stick and worst case it's now locked? Tried Infineon memtool with serial protocol and nothing. Quickly replace the chip. Memtool(using initial serial mode) says Okay and I set BMI to SWD0. Same thing - couldn't connect to target.
So:
- BMI value has been tripple checked before against reference manual and appnote. It's solid
- BMI value has been written with both rom function called from user program and memtool
- Documentation has been solid and I could doubt it only for 0.5seconds
- Chip has been changed
- Debugging doesn't work anymore
So time to start openocd debugging(instead of jlink debugging) with another probe and low and behold it identifies the target and I fly the binary in it and got the changes I wanted after testing.
XMC 2GO (ab)used as 5v debugger probe served me just long enought to catch hopefully the last bug and fine tune program parameters.
As I have production related functionality to implement maybe I need to figure out how to make openocd session work like it should before distributor sends me more xmc 2gos
(Or then I get that isolated XMC JLink)
Interesting detail: XMC1100 has SRAM parity check reset, Flash ECC reset, USIC(serial communication beast) ram parity reset and Clock Loss interrupt or reset. Also lockup reset in case of double hardfault. This MCU is 100% serious about performing zero unaccounted instructions, using erronous data or not executing required operations for critical task.
Interesting detail: XMC1100 has fixed(from user point of view) vectors. After startup software is completed vectors are remapped. Initial SP is loaded from flash offset 0x0 and Reset handler vector points to 0x4 flash offset that is location of first instruction to execute(EDIT: nope. 0x4 is where reset handler vector is actually). Other vectors point to slots of size of 0x4 in the RAM. That is why you can find these interesting veneers in startup file.
(reconstruction)
.globl X_Veneer
X_Veneer:
LDR R0, =X_Handler
MOV PC,R0
.long 0
.long 0
These are thumb instructions so it only takes 4 bytes(size of the slot) to enter the handler itself. Those zeros in this particular case after it are reserved slots maybe for MCU with another type core or something. See Reference manual page 64 and forward.
Interesting detail: XMC1100 doesn't have read protection to user program flash but when it's done - it's done. You lock it with BMI in production and combined with the fact that cortex m0 doesn't have VTOR for implementing bootloader in any sane way you should concider the chip unmalleable after that.
This particular detail should further define the chip and it's range of applications in production.