Just one command !

[e-thought]

I'm searching how to measure time between two rising edjes, i've got all the config for it, but i miss just the command that gives the value of the timer at a given moment in mikroc language ! please need help.

P-S: i really worked on learning mikroc, so don't think i'm just a lazy person ^^.

B.Z
Cordially.

[senso]

Read the timer register?

[e-thought]

yes, to know the time between two rising edje for example.

[Jeroen3]

Refer to the header file containing chip definitions. This sould include defines to access the timer register.

[e-thought]

that didn't help, i went to help on mikroc, but didn't find how to get the time between two rising edjes for example, even if i know how to set the timer to detect rising edje i can't get the time of it :/.

[Jeroen3]

You should tell at least what chip you're using for us to be of any more help.

[dannyf]

Easy: deltaT = T1 - T0 is all you need.

[e-thought]

I'm using p16f690.

@Dannyf: the thing i'm searching, is how to get the value of t1 and t0 ?

[Ian.M]

Its not simple. its not just one command.

Let Timer 1 free-run from an internal clock with the prescaler set so it doesn't roll over more often than the expected maximum interval between +ve edges.

Set up the CCP module to capture on a positive edge on the CCP1 pin and read the CCP1PR register pair every capture event to get a 'timestamp' for the edge.  You can do this in a CCP ISR or simply poll the CCP1IF, resetting it after reading CCP1PR.   

Subtract the two timestamps.

[e-thought]

@Ian.M thank you very much, with your help, i have now an idea what i must do.

[Ian.M]

There's also the T1G (Timer 1 gate) + external +ve edge triggered flipflop method.

Wire the flipflop as a divide by 2 stage with the input signal applied to its CLK input and its Q output going to the T1G gate.

Set up timer 1 to run from an internal clock gated by T1G (active high).
Poll the RA4/T1G pin and zero Timer 1 when its low. 
Wait for it to go high then back low.
Read duration directly from Timer 1.

An output pin connected to the flipflop RST input may be useful to hold the gate off till you want to take a measuremernt.

You may want to consider using an enhanced midrange device (PIC16F1xxx) as many of them have a Timer 1 gate circuit with an internal flipflop for period measurement and a one-shot circuit so you can get a single reading without having to worry about another pulse arriving before you've read the result.

[e-thought]

thank you very much, you're much helping me.when i get it done, i'll share the code to help others : D

[Ian.M]

The flipflop + gate method is easier for long intervals as when Timer 1 overflows, you can simply count the number of times TMR1IF gets set and use that count as the high word of a 32 bit result.

The CCP capture timestamp difference method gets gnarly if the interval is ever longer than the timer overflow period and the code to count overflows and compensate is particularly evil and sequence critical.

N.B I corrected the previous post to make more sense.

[e-thought]

my time interval is between 15us and 10ms so i guess it's too small

[Ian.M]

15us will be really tricky - that's only 30 instruction cycles @8MHz Fosc.

It should however be manageable in assembler or by the flipflop/T1G method.
It *MAY* be possible in C code if both timestamp variables are in the common (unbanked) RAM area.