Looking for software that generate RTL schematic from verilog code

[tigrou]

Hello,

I'm  learning verilog. I would like to know if there is any free tool that allow to view the equivalent schematic of a piece of verilog code ?
This will allow me to have a good understanding between what I wrote and an equivalent implementation at RTL level.

I'm thinking of something similar to RTLVision PRO (screenshot here). Unfortunately this one is not free

[rstofer]

Xilinx ISE (free WebPack) produces an RTL schematic from code.  I never tried to print it so I don't know how that will work out.

Xilinx Vivado (free WebPack) does the same thing but I have never tried it:
https://forums.xilinx.com/t5/Synthesis/View-RTL-Schematic-and-View-Technology-Schematic-in-VIVADO/td-p/475698

[hans]

Any free Altera/Intel Quartus edition can also do this, and it's often used (reports, lectures, projects, demos) in my courses for digital design; even if we don't actually synthesize our design (yet).
In my opinion, although I haven't used Xilinx tooling for 2 years, the Altera/Intel RTL produces more pretty (and printable!) pictures. I got an 80s vibe from Xilinx, I really don't see why they keep that style...

[m_t]

Yosys (http://www.clifford.at/yosys/about.html) is an open source synthesis suite for Verilog that can also generate RTL netlists, see e.g. http://www.clifford.at/yosys/screenshots.html.

[mac.6]

Any free Altera/Intel Quartus edition can also do this, and it's often used (reports, lectures, projects, demos) in my courses for digital design; even if we don't actually synthesize our design (yet).
In my opinion, although I haven't used Xilinx tooling for 2 years, the Altera/Intel RTL produces more pretty (and printable!) pictures. I got an 80s vibe from Xilinx, I really don't see why they keep that style...

Well that's an old version, recent vivado schematics are more up to date in the style departement.
On the other side, synopsys tools are still full 90'nix style...

[iMo]

IceCube2 includes Synplify Pro (Synopsys) and you get nice RTL/Technology views too..

[tigrou]

Thanks for replies.
Actually Yosys is really easy to use. The generated schema is a little bit hard to read but it does the job.

It did not tried others yet. Altera/Intel Quartus edition seems to worth a look (and it's only 1.7 GB)

[daveshah]

If you want something more readable that Yosys's built in graph viewer, netlistsvg can render pretty schematics from Yosys's JSON output.

https://github.com/nturley/netlistsvg

[mubes]

Now that's a find Dave! Thanks for that.

Dave