looking for the fastest usb-chip

[legacy]

hi guys
i have been toying with USB on my linux box and with VHDL in my fpga board, so i need something in the middle in order to make the linux host to transmit and receive data to/from the fpga with something expected like 4Mbyte/sec at least!

any hints ? example, chips, ideas

let me know.

[suicidaleggroll]

You're interfacing with an FPGA...why do you need anything "in the middle" to translate?  That's kind of the point of FPGAs, they can be anything you want/need them to be.

Unless you're just looking for something to simplify the interface to reduce development time?  I suppose the easiest thing would be an FTDI chip.  I've used their UART/USB interface chips in the past, they're reliable and work well, but they're typically only spec'd to 12 Mbps.  They do have the FT313 which is spec'd to 480 Mbps, but I have no experience there.

[miguelvp]

http://www.cypress.com/fx3/
can do 3Gbps and they have a $50 kit:
http://www.cypress.com/?rID=99916

I'm going to look for the USB controller that comes with the $4 prototype boards, but not sure if they'll be able to reach 4Mbps, I know they can do 1Mbps.

Anyways, Cypress has a lot of USB chips maybe even the fx2 will suit your needs.

Note that the kit is for peripherals not for implementing a USB Host. But it's targeted to be used with FPGAs

Edit: my mistake, it's 5Gbps (for the FX3)
The 4200 prototype kits at $4
http://www.cypress.com/?rid=92146

come with an CY7C65211-24LTXI
http://www.cypress.com/?rID=82869
capable of 3Mbps data rates and can be configures as: UART/I2C/SPI
I know they have other chips that can do JTAG as well.

Anyway, look around
http://www.cypress.com/?id=167&source=header

[marshallh]

FT232H

[legacy]

Anyway, look around
http://www.cypress.com/?id=167&source=header

that sounds good, too 

[legacy]

FT232H

Never used before, but i am reading interesting things about. FT232H has a special modes,


called

• Synchronous 245 FIFO is an half-duplex point-to-point communications interface, able so be synchronised to transmit data at a fixed clock rate (of 60MHz) and can support data flow rates up to 35MByte per second. It can transfer data at much higher data rates than Asynchronous 245 FIFO
• Asynchronous 245 FIFO it is similar, but slower, even if it does not need require the master and the slave devices to be synchronised to the same 60MHz clock

a bit of confusion in my mind, FTDI sells a lot of chips

• FT232H
• FT2232H
• FT245
• ...

I am also reading that FT2232H devices can be programmed for synchronous 245 FIFO mode. I already have a pair of this chips near here so i could buy them directly instead of waiting for the shipping by sparkfun/whoever.  Also i already have a pair of FT245, this chip gives an easy way to interface with electronics because each pin can be both input and output, thus give 8 digital channels to interface with. Unfortunately FT245 chips have a data transfer rate to 1 Megabyte / second with D2XX Direct Drivers and a data transfer rate to 300 kilobyte / second with VCP Drivers: they do not have the synchronous 245 FIFO mode data transfer rate of FT232H and FT2232H, if i have understood right.

Guys, do you confirm it ?

[legacy]

I am reading that the ftdi has closed sources and binary library for x86 only, if so, that is a problem because i need to toy with a linux running MIPS-be Atheros chip

i have been reading about open-libftdi library, but it seems still requiring binaries for the 245 FIFO Mode.

Any help/hints/comment is welcome

[marshallh]

official FTDI works fine on all platofrms.
libftdi works too, but does have bugs.

FT2232H is earlier product, has 2 separate FIFOs. Can be bridged together for Synchronous mode for 20-30mb/sec.
FT232H is later product, 1 FIFO but can be synchronous also for fast speed. $2 cheaper.
FT4232H is the same die as the 2232H! But with another 2 fifos enabled. More expensive.

These support Async FIFO which is the mode used by FT245 and others. The upper limit for Async FIFO is about 7mb/sec.

[wraper]

You're interfacing with an FPGA...why do you need anything "in the middle" to translate?  That's kind of the point of FPGAs, they can be anything you want/need them to be.

USB requires special hardware as it uses differential signaling. You can get away with that at the low speed but at full and especially high speed can run into problems. And of course doing high speed is not trivial by itself.

[hans]

The FTxx32H chips springs to my mind as well.

Note the -H suffix. It's the "high speed" variant with 480Mbps USB 2.0 High Speed (no Full Speed; that is 12Mb/s).
Although a FPGA could be able to do that, I wouldn't waste "silicon" and time in making that yourself. My experience with USB is that it's a bitch-protocol, because although the 480Mbps is nice, the latency often is not.

FTDI is closed source for Windows, but the Linux kernel contains native drivers for their chips. Otherwise a bit of RE later and it's not hard to figure out how to talk with the FTDI chips protocol (moreover: linux kernel drivers can help out a ton, so does IDA). At that point you could probably using something like libusb to talk directly past any driver to the chip.

[legacy]

official FTDI works fine on all platofrms

things from www dot ftdichip dot com are only for x86 machines, and they provide no sources, only x86 binaries for Windows and Linux.

See the gentoo portage

Code: [Select]

dev-embedded/libftd2xx-1.1.12
      Homepage:      http://www.ftdichip.com/Drivers/D2XX.htm
      Description:   Library that allows a direct access to a USB device
      License:       FTDI LGPL-2.1+


Code: [Select]

src_install() {

        use amd64 && cd "${S}"/release/build/x86_64
        use x86 && cd "${S}"/release/build/i386

        into /opt
        dolib.so ${PN}.so.${PV}
        dosym ${PN}.so.${PV} /opt/$(get_libdir)/${PN}.so.${PV:0:1}
        dosym ${PN}.so.${PV:0:1} /opt/$(get_libdir)/${PN}.so
        insinto /usr/include
        doins "${S}"/release/ftd2xx.h "${S}"/release/WinTypes.h


that means there are no sources in the ebuild, it's just a binary archive that will be installed in /opt/ftd2xxlib/

that means you can't emerge dev-embedded/libftd2xx on MIPS/ARM/PPC/HPPA machines because there are no binaries for such a platforms.

you need  open-libftdi, which is limited as described in its README.TXT and TODO.TXT

[legacy]

USB requires special hardware as it uses differential signaling.

Also USB requires an USB-stack, which requires a SoftCore, and i do not have the resources to implement a SoftCore plus its ram and rom in order to handle the USB!

[legacy]

using something like libusb to talk directly past any driver to the chip.

good points, also the  open-libftdi is open source and very useful, even if limited in a few features, btw the open-libftdi has examples of its usage, they are included with the source package.

[marshallh]

you don't need a softcore, though it makes things easier.

You can download my usb2 and usb3 IP cores here:
https://github.com/mossmann/daisho/tree/master/sw/fpga/common/usb3

You can use a USB3300 phy or similar for $1 and plug it into the USB2 module.
You get a BULK IN and BULK OUT endpoints, with an easy DMA-based interface. It handles enumeration itself.
It's all FSMs, straight verilog.
If you want to use USB3 pelase contact me first as there are a lot of gotchas about doing that.

[sacherjj]

I remember someone working on an Open Source Hardware USB3 interface in FPGA.  I believe it was this:

https://www.kickstarter.com/projects/1085541682/bladerf-usb-30-software-defined-radio

They found many bugs with Cypress and other's USB3 implementation.  It is on an FPGA with space to do other things.  Edit: That isn't it, it uses Cypress.  Thinking Great Scott Gadgets....

There we go: https://greatscottgadgets.com/daisho/

I hate it when my mind swaps to disc...

Edit Again: Dolt!  That was the post before me by marshallh and I didn't know it.      Pretty much sums up my day. 

[miguelvp]

They found many bugs with Cypress and other's USB3 implementation.  It is on an FPGA with space to do other things. 

Do you have a link to the bugs on the Cypress chips?
because it's not fair to just state that without solid evidence. It could be they just didn't know how to use it or wire it properly for all we know.

[marshallh]

I didn't work with any Cypress stuff. I did work with a variety of hubs and host controllers.
Intel, NEC, VLI, Asustek, etc. All have bugs. Many fail several USBIF compliance tests.

USB3 stuff is internally very buggy, though finally some progress is getting made.  Stay away from VLI stuff, it's total crap though.

The FX3 looks nice but it is quite expensive. It's like a ridiculous swiss army with 500 features. Cypress are usually pretty competent when it comes to things like compliance but there will always be kludges that weren't in the spec, just to make things worse.

[free_electron]

USB requires special hardware as it uses differential signaling.

Also USB requires an USB-stack, which requires a SoftCore, and i do not have the resources to implement a SoftCore plus its ram and rom in order to handle the USB!

not true.  usb can be done using a state machine. no need for softcores or usb stacks.
altera and xilinx both have usb engines that do raw stream transport. on the host side you simply send an array of bytes to an endpoint and they arrive in ram on the other side. all you need is a usb phy

[legacy]

not true.  usb can be done using a state machine. no need for softcores or usb stacks.

a soft core can make things easier than having to deal with complex vhdl code

[TunerSandwich]

Possibly have a look at some of Marvels offerings....but do keep in mind the limited support