Mico32 on Altera FPGA with debug? Asking too much?

[Boscoe]

Currently I feel Mico32 is the most convenient soft core out there for free as is has a nice GUI through eclipse for both soft core and software development. I'm a long term Altera user and not too interested in switching but I don't want to pay for the NIOS II. Currently to use the Mico32 I generate the HDL write the software, compile, convert the output and add it into my HDL. This is a long winded process that isn't viable for big projects. Does anyone have any experience in using JTAG (through GPIO or host JTAG) to configure and debug the Mico32 in a non Lattice FPGA?

Thanks
Boscoe

[technix]

I think that ARM is offering Cortex-M0 for free (as in beer) for playing around and at a reduced cost for commercialization. That one comes with fantastic support though. And you would be able to use any OpenOCD-compatible debug probe to program and debug it (if you gave it the SWJ-DAP option instead of the simpler SW-DAP that requires SWD. In fact you can even try internally chaining the SWJ-DAP into the JTAG pins of the FPGA so your USB Blaster can go immediately from Quartus to Eclipse for debugging.

However I doubt if the smaller FPGAs can even take half of it though.

[ali_asadzadeh]

Also to mention that ARM would give you the Verilog version of M0 without debug at no cost and you can implement it in almost any FPGA and use keil to compile the code for it,

Cortex M is the best option for embedded with lots of supporting software, I think anything else would be shooting yourself in your foot considering that we have 0.6USD Cortex devices from ST and others. Also if you are interested I can supply you the ST parts @ 0.6USD to you.