Is the output frequency spec the correct thing to look at when trying to determine what the rise time when setting an output high will be? https://e2e.ti.com/support/microcontrollers/msp430/f/166/t/81249 seems to say it is.
For my device, G2121, that spec is 12MHz @ 3V, R=1k, C=20p. By the bandwidth/rt relationship: .35/.012 = 29ns. Does that seem about right?
The max clock frequency at 3V is maybe 14MHz, so I take it that 12MHz reflects the rise time limitation of the output itself and not the fastest rate at which the output can be toggled just due to clock speed limits.
I'll also note that 2.2RC = 44ns. The calculated rt is actually faster than that! But the 1k load is a resistive divider .5k/.5k and Vo is the center tap. I don't understand how that center tap ever gets to .9*VCC (shouldn't it only get to half of that? maybe the spec is misdocumented and that's what they mean) but anyway if we use .5k as R then 2.2RC = 22ns, which seems to make a little more sense than 44ns.
Now, IIUC, if I reduce RC, I'm not going to reduce the rise time of the output because I'm already below the limit. Yes?
I haven't used these chips but the rise time will probably be under 10ns. If the circuit the pin is connected to has a 100pF capacitance, the risetime may rise to 20ns. Don't really know without testing it.
The speed of the chip will be set by internal design considerations, such as the longest chain of internal combinatorial logic has to be able to settle within one clock cycle. Also this chip is designed for sub mA operation - that is a major limit to the clock speed. You cannot guess anything concerning the outputs from the clock speed.
That post you referred to was one of the most use answers I have seen. He could have reduced it to "things get affected by things". He should have said "I do not know".
Someone who knows the chip will know that the output pins have an ON channel resistance - maybe 40 or 100 ohms. If the output connects to one or two part nearby, then that might be a 30pF capacitance. The time constant then for 40 ohms would be under 2ns. If you add a 1K load, it just acts as a resistive divider with the output resistance. So if the output is 40 ohms and it pulls high, then you get Vcc x 1K/(1K + 40) on the output.
Edit: not sure what to make of the output spec you attached. If it can get to 90% with a 1K load, then the port resistance is typically under 100ohms. If you increase the load capacitance from say 20pf to 40pf, that should only slow the port by perhaps 2ns extra. If that is the best output specs published in the datasheet, it is very dissapointing since you you cannot base a design off typical specs anyway. you need to know the limits over the temperature range.
That output spec is totally contradictory since they say the test is done at a 1K load and they also say it is done with 0.5k resistors to the two supply rails which is a 0.5K ohm load, and it implies the port resistance is less then 50 ohms.