Author Topic: MSP432 Problem with Timer Interrupt  (Read 3296 times)

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Offline WesPiardTopic starter

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MSP432 Problem with Timer Interrupt
« on: July 29, 2017, 02:59:26 am »
Hello everyone!

I just started working with the MSP432P401R launchpad. My goal for now is to sample audio at 44.1kHz and then re-output it through a DAC to an amplifier with an 8-ohm speaker on the output.

I have the ADC working fine, but I'm having trouble with my sampling timer. I'm running the chip at 48 MHz in VCORE1 active mode. Here is my timer initialization code as well as the interrupt function:

Code: [Select]
void TA0_0_IRQHandler(void)
{
P2->OUT ^= BIT7;
}

void TIMER_init()
{
TIMER_A0->CCTL[0] = TIMER_A_CCTLN_CCIE; //Enable CC interrupt

TIMER_A0->CTL = TIMER_A_CTL_TASSEL_2 | //Select SMCLK as source for timer
TIMER_A_CTL_ID_3 | //Divide clock by 8 (this yields 6 MHz for the timer clock)
TIMER_A_CTL_MC_1 | //Up mode
TIMER_A_CTL_CLR ; //Clear timer count

TIMER_A0->CCR[0] = 136; // 6 MHz / 44.1 kHz = 136

}

Fore testing purposes, my interrupt function just toggles a GPIO pin so I can analyze it with my oscope. Here's a picture of what the output of the pin looks like:

http://imgur.com/a/VJBmM

With the current settings, the pin is being toggled every 744ns. It seems like the interrupt function is just being ran constantly, because when I put a breakpoint in my while(1) loop in my main function, it never hits. But when I put a breakpoint in my timer interrupt function, it always hits.

Are there flags I HAVE to clear or something? It would make sense that the ISR keeps getting triggered if I'm never servicing/clearing the flag. I'm just not sure what to do.

 

Offline Monkeh

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Re: MSP432 Problem with Timer Interrupt
« Reply #1 on: July 29, 2017, 03:58:51 am »
Have you considered simply trying clearing CCIFG?
 
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Offline Cervisia

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Re: MSP432 Problem with Timer Interrupt
« Reply #2 on: July 29, 2017, 12:34:08 pm »
For the interrupts that share an interrupt vector (TAIFG, and CCIFG for all CCRs except CCR0), the interrupt flag gets reset when you read the TAxIV register.
But CCR0 CCIFG has a separate interrupt vector for this single source, which implies that the hardware knows when the interrupt is handled. So the MSP430 clears the interrupt flag automatically.  8)
But the MSP432 does not. Because what's the fun of having a faster CPU when you don't use it?   |O
 
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Offline WesPiardTopic starter

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Re: MSP432 Problem with Timer Interrupt
« Reply #3 on: July 29, 2017, 02:50:35 pm »
Thank you guys, this was my problem. I just assumed since it was the dedicated interrupt for CCR0, the flag would be cleared automatically. Silly me..
 


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