I think what you are looking for is called an "Asynchronous Sample Rate Converter". It will take an input stream at a given sample rate, and resample it to another sample rate. These are often used for the exact application you mention, where you have multiple data sources that all have the same nominal sample rate, but whose actual sample rates may drift with respect to one another, and you need to match everything to a master sample rate to do your processing.
I think that all the major players (TI, AD, Cirrus, etc) have ASRC chips. You can also implement something in the FPGA to do the sample rate conversion; Xilinx even used to have some IP to do just that, but it isn't supported any longer.
They generally work by comparing the input and output sample rates to determine the resampling ratio, interpolating to a very high sample rate (practically continuous), and then decimating to the output sample rate. Practically, poly-phase techniques and an FIR filter with reloadable coefficients are used to keep actual sample rates within reasonable limits.
All the audio work that I've done has been with a single master clock, so I haven't ever needed an ASRC, but the theory behind them is pretty fascinating.
If you don't want to dive into the theory, then you probably just want to drop in a couple of the ICs to get all of your inputs onto the same clock before processing. You could implement something on the FPGA, but that would be a pretty involved project just by itself.