My crystals are disagreeing with each other.

[technix]

The STM32F303CCT6 can operate with two crystals: one watch crystal driving the RTC, and one high-speed crystal driving the processor clock PLL.

I derived two 1Hz signals from the clocks: the slow crystal is divided down to provide the 1Hz clock for the RTC. The fast crystal is PLL'd up to 72MHz, then divided down to provide a millisecond interrupt, and software counts 1000 interrupts to generate another 1Hz clock. Those two slightly disagree with each other.

Questions:

1) Why?
2) Which crystal is at fault? How to tell?
3) How to reduce or eliminate this?

[coppice]

The STM32F303CCT6 can operate with two crystals: one watch crystal driving the RTC, and one high-speed crystal driving the processor clock PLL.

I derived two 1Hz signals from the clocks: the slow crystal is divided down to provide the 1Hz clock for the RTC. The fast crystal is PLL'd up to 72MHz, then divided down to provide a millisecond interrupt, and software counts 1000 interrupts to generate another 1Hz clock. Those two slightly disagree with each other.

Questions:

1) Why?
2) Which crystal is at fault? How to tell?
3) How to reduce or eliminate this?

How "slightly" do they disagree? Are you talking about more than just the tolerance of the crystal? If so, are the crystals loaded properly? You can pull any crystal a little with poor loading, but if you used a crystal designed for VCXO applications you might be able to pull it quite a lot.

[technix]

The STM32F303CCT6 can operate with two crystals: one watch crystal driving the RTC, and one high-speed crystal driving the processor clock PLL.

I derived two 1Hz signals from the clocks: the slow crystal is divided down to provide the 1Hz clock for the RTC. The fast crystal is PLL'd up to 72MHz, then divided down to provide a millisecond interrupt, and software counts 1000 interrupts to generate another 1Hz clock. Those two slightly disagree with each other.

Questions:

1) Why?
2) Which crystal is at fault? How to tell?
3) How to reduce or eliminate this?

How "slightly" do they disagree? Are you talking about more than just the tolerance of the crystal? If so, are the crystals loaded properly? You can pull any crystal a little with poor loading, but if you used a crystal designed for VCXO applications you might be able to pull it quite a lot.

It is within the tolerance of the crystals, but it is there regardless. Those are properly loaded with 22pF (fast clock) and 3pF (slow clock) capacitors.

[fcb]

It is within the tolerance of the crystals, but it is there regardless.

[b_force]

It is within the tolerance of the crystals, but it is there regardless.

Yep, lesson one about crystals.
Because of how there physics work (how they are build), they WILL be different.

[dmills]

"A man with one watch knows what the time is, a man with two is never sure!"

Of course the things differ (And neither one is actually 'right'), but if they are both in tolerance then why do you care?

Regards, Dan. 

[newbrain]

What everyone else said...

But I'll add this:
If you've used the HAL and SysTick, there's a nice little bug that will set the relevant registers with a value some ppm off for a "real" 1ms interrupt, for some PLL configurations.

[cstratton]

If you want to know which is at fault (or more likely, how much each is wrong by in which direction) you need a more trustworthy reference timebase.

For example, the 1 pps output of a GPS.

Or a temperature controlled reference oscillator.

[technix]

What everyone else said...

But I'll add this:
If you've used the HAL and SysTick, there's a nice little bug that will set the relevant registers with a value some ppm off for a "real" 1ms interrupt, for some PLL configurations.

I am not using HAL - just hand-programmed registers.

[technix]

If you want to know which is at fault (or more likely, how much each is wrong by in which direction) you need a more trustworthy reference timebase.

For example, the 1 pps output of a GPS.

Or a temperature controlled reference oscillator.

I do have a Wi-Fi module on it with the intention of implementing NTP. Does NTP from a GPS-disciplined Stratum 1 NTP server on the same LAN offer good enough accuracy?

[ejeffrey]

NTP will be eventually be more accurate than a crystal, so that should work.  But it sounds like you crystals are in spec, so I wouldn't worry about it.  Crystals typically have similar aging and temperature drift as their accuracy spec.  That means that even if you measure them to 1 ppb today, it won't necessarily be that good tomorrow.

[tszaboo]

It is within the tolerance of the crystals, but it is there regardless. Those are properly loaded with 22pF (fast clock) and 3pF (slow clock) capacitors.

I dont understand the question then. You already should know the answer.
1) Because tolerance
2) There is no fault, it is whiting spec.
3) The one which has smaller tolerance