Author Topic: New official Arduno Cinque board uses 320 MHz RISC-V SoC.  (Read 16876 times)

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Offline retrolefty

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Re: New official Arduno Cinque board uses 320 MHz RISC-V SoC.
« Reply #25 on: May 21, 2017, 01:42:51 am »
They don't have to have all they products to be useful for everyone. Don't like the board - don't buy it.

I like none of their products. They are all useless, except those based on AVR8
(e.g. Arduino2009, Mega*, Nano*, etc)

Of course, it's my point.  I won't buy it for sure  :popcorn:

 I too believe that the Arduino platform 'peaked' with the AVR 8 bit boards. I will always be grateful for what they brought to the open source world. However their attempt to expand to ARM have been underwhelming and fractured.

 There remains a great opportunity for someone to bring the world a hobbyist and beginners friendly and easy to use ARM based product and IDE.

 
 

Online ataradov

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Re: New official Arduno Cinque board uses 320 MHz RISC-V SoC.
« Reply #26 on: May 21, 2017, 01:46:35 am »
though it it hard to believe how much less expensive the open ISA could make those commodity devkits compared to $10-$45 range of OrangePi / RaspberryPIs / BeagleBone
They will not get to that price in many-many years. ARM's cut in those things is not that great, and to see substantial savings, you need to make millions of them, and this is just not gonna happen with RISC V for quite some time.

Alex
 

Online ataradov

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Re: New official Arduno Cinque board uses 320 MHz RISC-V SoC.
« Reply #27 on: May 21, 2017, 01:59:48 am »
Si Five licenses their cheapest CPU core at $295k, while ARM (which has considerably higher compatibility and better ecosystem) only licenses their M0 core for $40k. I wonder what gives the Si Five guys confidence on such bald pricing.
I would imagine it is a matter of specific contract with Si Five. Where is this information from (Si Five license cost)?

Also, you should really compare it to M7, not M0.
Alex
 

Online ataradov

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Re: New official Arduno Cinque board uses 320 MHz RISC-V SoC.
« Reply #28 on: May 21, 2017, 02:05:58 am »
Ok, so I guess they have "pivoted". Good luck to them with this, but I'm not really interested in that. ARM has nothing to worry about here :)

Quote
“A year ago there was quite a debate if people would license a core if there was a free version, [but now] we’ve seen significant demand for customers who don’t want an open-source version but one better documented with a company behind it,” said Jack Kang, vice president of product and business development at SiFive.

Wow, that's some marketing spin. So documenting and standing behind the open version was not an option? :)
« Last Edit: May 21, 2017, 02:07:50 am by ataradov »
Alex
 

Online brucehoultTopic starter

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Re: New official Arduno Cinque board uses 320 MHz RISC-V SoC.
« Reply #29 on: May 21, 2017, 03:39:23 am »
It will be nice to see some inexpensive Raspberry-PI / BeagleBone class PCBAs based on these though it it hard to believe how much less expensive the open ISA could make those commodity devkits compared to $10-$45 range of OrangePi / RaspberryPIs / BeagleBone but having the architecture in a fast SOC as a devkit will be nice.

Those guys are using obsolete and fully amortised smartphone application processors that have already shipped in huge volume.

Pretty clearly a board using a new architecture and new SoC is not going to hit those price points. Anything we see in the near future is intended primarily as a "dip your toes in the water" route for people who are considering designing the SoC (or a related custom one) into a product. Literally an evaluation board.

The boards are also not going to cost the $500 - $2000 that such boards used to cost.

They will also sell to hobbyists who only want one or two and actually are not all that price sensitive about paying maybe twice the price. e.g. people who buy Odroid XU3/4 now.
 

Online ataradov

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Re: New official Arduno Cinque board uses 320 MHz RISC-V SoC.
« Reply #30 on: May 21, 2017, 03:41:50 am »
But with all this, if core is closed, then I really see no reason to even go to the hobbyist. Normal people will just stick with ARM. I seriously doubt RV will have any performance advantage.
Alex
 

Online brucehoultTopic starter

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Re: New official Arduno Cinque board uses 320 MHz RISC-V SoC.
« Reply #31 on: May 21, 2017, 03:52:02 am »
Execution from quad SPI essentially makes this a 40MHz part.     I use SPIFI on the LPC series as it is good for boot code, etc but it is very slow. 

I am curious to the amount of SRAM and their target use case.

You may have missed the 16 KB of instruction cache? (32 byte lines, 2 way associative)

If it's exactly the same SoC as the HiFive1 (it seems to be) then it will also have the same 16 KB of SRAM for RW globals/stack/heap.

I haven't seen anything about what SPI flash is on this board. The HiFive1 has a 16 MB part that runs at up to 133 MHz (and then quad on top of that), so reasonably speedy to stream code to fill the cache.

On the HiFive1 the SPI does badly hurt *data* accesses to RO data in the .text/.rodata as there is no data cache. If you're going to access some lookup table in your inner loop then you get a massive speedup from copying it to the SRAM if you can afford the space for it ... or just leave off the "const" so the startup code will do it for you.

 

Online brucehoultTopic starter

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Re: New official Arduno Cinque board uses 320 MHz RISC-V SoC.
« Reply #32 on: May 21, 2017, 03:58:36 am »
But with all this, if core is closed, then I really see no reason to even go to the hobbyist. Normal people will just stick with ARM. I seriously doubt RV will have any performance advantage.

Of course.

Literally no one thinks RISC-V will suddenly replace 99% of the ARMs out there, just as the 8086 and 68000 didn't suddenly replace all the VAXes and IBM mainframes, and Linus' toy OS didn't suddenly replace all the Solaris and Irix and HP/UX and AIX.

In the next five years, no one is going to get fired for buying ARM cores or SoCs.
 

Online ataradov

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Re: New official Arduno Cinque board uses 320 MHz RISC-V SoC.
« Reply #33 on: May 21, 2017, 04:02:05 am »
All those things in your comparison were under-performing, but had real advantages over the thing they replaced.

This closed system aims to replace another closed system with no performance advantage. There is a difference.

Also, with it being closed, TrustZone and Management Engine will follwow, since market will demand this, and sales people will want to see a bullet point in the PowerPoint presentation.
Alex
 

Online brucehoultTopic starter

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Re: New official Arduno Cinque board uses 320 MHz RISC-V SoC.
« Reply #34 on: May 21, 2017, 07:34:31 am »
Quote
Those guys are using obsolete and fully amortised smartphone application processors that have already shipped in huge volume.

Pretty clearly a board using a new architecture and new SoC is not going to hit those price points. Anything we see in the near future is intended primarily as a "dip your toes in the water" route for people who are considering designing the SoC (or a related custom one) into a product. Literally an evaluation board.

The boards are also not going to cost the $500 - $2000 that such boards used to cost.

They will also sell to hobbyists who only want one or two and actually are not all that price sensitive about paying maybe twice the price. e.g. people who buy Odroid XU3/4 now.

That's exactly so as far as I can tell.
From the below it sounds like the prototype evaluation kit SoCs will be in the $10 range of BOM cost for them and I'm sure another $20 or whatever for DRAM / PCBA / FLASH / assembly / connectors at least and then some profit for shipping / handling / production / overhead and I suppose the PCBAs could be in the $40-$100 range depending on economy of scale.  It would hardly matter if it was $10 or $500 if it was for customers truly wanting to evaluate the architecture for making custom SOCs / ASICs..  Though if they want "a lot of" hobbists to buy it to create architectural "buzz" in that community then I guess they'd start to be considered "quite expensive" if it was more than the RPi, the Beaglebone and even more than a low cost micro-ITX mainboard + CPU.  So I suppose $40-$100 would be the sweet spot for all but the most dedicated and curious hobbyists.

Agree with all.

Their previous "HiFive1" board is $59 https://www.crowdsupply.com/sifive/hifive1

The major differences we know of now are the addition of the ESB32 (+$5), and the replacement of FTDI by an STM Cortex M3 with USB (maybe a buck or two saved).

So the price should be pretty similar. Maybe a little higher BOM, but also maybe they'll make more than the thousand or so of the HiFive1. And we don't know what profit or subsidy, if any, there is in either one. SiFIve just got another $8.5m of Series B to burn through. Even subsidising 10000 boards by $50 each ($0.5m) might not be a stupid use of money to help create that buzz. The salary clock is ticking away all the time and the runway getting shorter.

To me therefore it is actually somewhat a disadvantage that there would be a hard SOC ASIC since for $50-$300 range it'd be more all around useful to have a ZYNQ / Artix / Spartan 6 / Cyclone V-SOC / whatever FPGA board that happens to have a soft-core that runs this than a hard core SOC that has less interface / peripheral / media / processing capability than the RPi / Beaglebone / whatever.

You know you can load the HiFive1 design into a $99 Arty FPGA board? And you can tweak it with your custom instructions etc all you want.

https://dev.sifive.com/freedom-soc/evaluate/fpga/

It only runs at 65 MHz, but that's true even with the $3500 VC707 FPGA board.
 

Online ataradov

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Re: New official Arduno Cinque board uses 320 MHz RISC-V SoC.
« Reply #35 on: May 21, 2017, 07:39:02 am »
What's the point of loading that into FPGA, when it is basically an abandoned platform? They are not going to support any of this open-source nonsense as soon as they get closed designs out.

The whole thing is one big marketing plot.
Alex
 

Online brucehoultTopic starter

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Re: New official Arduno Cinque board uses 320 MHz RISC-V SoC.
« Reply #36 on: May 21, 2017, 08:25:03 am »
What's the point of loading that into FPGA, when it is basically an abandoned platform? They are not going to support any of this open-source nonsense as soon as they get closed designs out.

That's your opinion, to which you are entitled, though I'd be more comfortable if you added an "I work on ARM stuff for Atmel" disclaimer.

Your opinion is contrary to what the SiFive founders, several of whom are also still academics at Berkeley, say. They'll lose face more by changing the plan than they will by failing commercially.

A major advantage of open source with a free license, of course, is that once it is released it is out there forever, regardless of whether the originator ceases to exist, or makes later improvements closed (as the license entitles anyone to do, not only SiFive).

Note that the thing they are offering for a $275k fee is primarily "free" support, along with customization and some extra peripheral busses.

My own disclaimer: I currently work at Samsung R&D Russia on a project for "Device Solutions", the chipmaking division of Samsung, an ARM architectural licencee that designs some of its own ARM cores and SoCs (e.g. Exynos). However I'm working on another kind of chip and have no knowledge of any future ARM, RISC-V or other CPU plans.
 

Online ataradov

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Re: New official Arduno Cinque board uses 320 MHz RISC-V SoC.
« Reply #37 on: May 21, 2017, 08:28:38 am »
"I work on ARM stuff for Atmel" disclaimer.
This has absolutely nothing to do with this. I want RISC V to succeed, I supported both KS campaigns, and got the board. But I want it to succeed on the promised freedom and openness. If all commercial implementations are closed and proprietary, then there is really no point in any of this, it is just another platform.

My opinion is based purely on observing trends. This is not the first project to start with a goal of freedom, but as soon as investors come in, all freedom ends, and cut throat capitalism starts.
« Last Edit: May 21, 2017, 08:30:54 am by ataradov »
Alex
 
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Online brucehoultTopic starter

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Re: New official Arduno Cinque board uses 320 MHz RISC-V SoC.
« Reply #38 on: May 21, 2017, 09:05:41 am »
I want it to succeed on the promised freedom and openness. If all commercial implementations are closed and proprietary, then there is really no point in any of this, it is just another platform.

I agree 100%.

The innovation here is in the "business model" not in the technical side, which is pretty straight up simple 2010 accumulated "Industry best practice" rather than some startling innovation.

Technically, RISC-V is much cleaner than a full ARM chip with 3 - 5 ISAs (A32, T32, A64, Jazelle, T2EE). The advantage over a restricted T32-only Cortex M or A64-only like Cavium (and Apple?) is minor to zero.

RISC-V does have one Unique Selling Proposition that may be very attractive in some markets: by far the best code density of any 64 bit ISA.

Even if it fails in embedded, I think we're likely to see 100 - 1000 core RV64 chips hitting data centres within a couple of years at most. How hard would it be for Cavium to pivot and strap an RV64GC decoder on to their uArch? Not very, I think. And their customers don't have a lot of code in A64 assembler.
 

Offline julian1

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Re: New official Arduno Cinque board uses 320 MHz RISC-V SoC.
« Reply #39 on: May 21, 2017, 11:17:11 am »
There are also things like these for SOCs / cores / boards / projects:
...
http://icoboard.org/
http://icoboard.org/verilog-projects.html
https://github.com/cliffordwolf/icotools/tree/master/icosoc
...

I have an icoboard. Unfortunately, I haven't had a chance to try Clifford's pico risc-v core with it yet.
 

Offline julian1

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Re: New official Arduno Cinque board uses 320 MHz RISC-V SoC.
« Reply #40 on: May 21, 2017, 11:25:14 am »

Also, with it being closed, TrustZone and Management Engine will follwow, since market will demand this, and sales people will want to see a bullet point in the PowerPoint presentation.

There's actually a market for CPU's that don't have IME, PSP or (from what I can determine - the less intrusive) TrustZone,

https://www.reddit.com/r/Amd/comments/5x4hxu/we_are_amd_creators_of_athlon_radeon_and_other/def5h1b/
 

Online ataradov

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Re: New official Arduno Cinque board uses 320 MHz RISC-V SoC.
« Reply #41 on: May 21, 2017, 05:23:16 pm »
All of the above will require thousands of man-years to develop. Where you will get money to fund this?

It is easier to build working communism than what's described above.

Also, simulation of the silicon alone is already so slow, that it is impractical to do a lot of it. Adding system level things will make you wait weeks until minutes of real-time operation is characterized.

And all of that assumes that your whole thing is open, and you somehow managed to get all of the peripherals in an open form. Most high-end MCUs on the market right now include a number of licensed peripherals, so you will have to either write them yourself, or convince vendors to do a lot more work for you. They will gladly do it, but they will also charge you for it. Your fully characterized system will cost more than the most expensive military hardware wee have today.
« Last Edit: May 21, 2017, 05:27:03 pm by ataradov »
Alex
 

Online ataradov

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Re: New official Arduno Cinque board uses 320 MHz RISC-V SoC.
« Reply #42 on: May 21, 2017, 05:30:28 pm »
There's actually a market for CPU's that don't have IME, PSP or (from what I can determine - the less intrusive) TrustZone,
This is demand comes from people being screwed over. But most likely, if spying chip has higher performance and costs less (because it is subsidized by Microsoft, for example), then people will go and by it.

It is like being beaten up on United flight. All they have to do is offer cheaper flights, and people will buy them despite the outrage on the forums.

And marketing people know all of this perfectly well.
Alex
 

Online ataradov

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Re: New official Arduno Cinque board uses 320 MHz RISC-V SoC.
« Reply #43 on: May 21, 2017, 06:17:35 pm »
Already QEMU or similar virtualizations let me simulate the ISA of a totally foreign ISA on a PC at basically real time.
Yes, but it is just ISA emulation, and not a cycle accurate simulation. I've seen cycle accurate simulation of Cortex-M0 with modern tools, and it is way way slower.

I can already use XMOS tools to get timing analysis to the cycle level of I/O pins and C code at the application level very quickly after a build.  And FPGA tools will tell me if a 50k LUT FPGA design does meet timing or whatever quite quickly as well.  And there are already (SPIKE etc. IIRC) RISC-V ISA simulators that let you run RISC-V program codes on a PC in simulation quite fine to the instruction level.
I've seen projects that had ~90% utilization on the highest density Virtex-2Pro, they took ~24 hours to synthesize, and hours to simulate milliseconds of real-time operation. This was when Virtex-2Pro was new, around 2005 or so, but I doubt things improved that much.

XMOS can do that because your configuration options are reasonably limited compared to a real CPU core.

There has been a huge improvement in development tools in recent years, and trend continues. But so far I see no indication that being open source is a contributing factor. If corporations wanted to come up with brilliant debug tools, they wold. The problem is that debug tools are money sinkers, so nobody goes out of their way to implement new things.
Alex
 

Offline mac.6

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Re: New official Arduno Cinque board uses 320 MHz RISC-V SoC.
« Reply #44 on: May 23, 2017, 08:49:56 pm »
Today there is hybrid machine for RTL simulation, like synopsys zebu machines, these are real beasts able to simulate at cycle level and with good speed (around Mhz range) a full cortex-A with peripherals (inc GPU).
ok that's not a common tool to find in your average-joe company...
 

Offline coppice

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Re: New official Arduno Cinque board uses 320 MHz RISC-V SoC.
« Reply #45 on: May 24, 2017, 05:07:02 am »
Today there is hybrid machine for RTL simulation, like synopsys zebu machines, these are real beasts able to simulate at cycle level and with good speed (around Mhz range) a full cortex-A with peripherals (inc GPU).
ok that's not a common tool to find in your average-joe company...
Zebu machines are quite popular inside silicon vendors.
 

Offline legacy

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Re: New official Arduno Cinque board uses 320 MHz RISC-V SoC.
« Reply #46 on: May 24, 2017, 08:13:28 am »
Zebu machines are quite popular inside silicon vendors.

Price?
 

Offline legacy

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Re: New official Arduno Cinque board uses 320 MHz RISC-V SoC.
« Reply #47 on: May 24, 2017, 08:29:45 am »
But for things like UARTs, SPI port, I2C port, PWMs, timers, GPIO, interrupt controllers, ethernet controllers, DRAM controller, bus interfaces. I cannot see why those would / should not be 100% open source HDL. 



Yeah, people believe what they want to believe.
I want to believe cows are violet and white,
and mine produces delicious free chocolates  :palm:
 

Offline coppice

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Re: New official Arduno Cinque board uses 320 MHz RISC-V SoC.
« Reply #48 on: May 24, 2017, 08:51:25 am »
Zebu machines are quite popular inside silicon vendors.
Price?
If you worry about the cost, you've never faced the financial consequences of an error in a mask set that can't be fixed on the metal layers. :)
 

Offline legacy

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Re: New official Arduno Cinque board uses 320 MHz RISC-V SoC.
« Reply #49 on: May 24, 2017, 10:01:04 am »
If you worry about the cost, you've never faced the financial consequences of an error in a mask set that can't be fixed on the metal layers. :)

and it doesn't take a Sherlock to figure out that.
(it's written in every HDL book).

My question is just a question: what is the price of this tool?
 


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