Author Topic: OV5640 help needed! No PCLK signal  (Read 9778 times)

0 Members and 1 Guest are viewing this topic.

Offline malkaunsTopic starter

  • Contributor
  • Posts: 32
  • Country: us
OV5640 help needed! No PCLK signal
« on: July 29, 2016, 07:36:20 pm »
I am working on a project involving cameras using a Zynq FPGA on a Digilent Zybo board. I can successfully get a response from an OV7670 by configuring it via SCCB. Even without configuration the OV7670 provides a PCLK and drives the data pins as long as I provide it an appropriate XCLK signal. I have recently bought an Arducam OV5640 module. The documentation that I have read so far about this module suggests that I can still use 3.3V logic. I get no response from this module when providing a 12-25MHz XCLK signal. Can someone point me in the right direction and make me aware of what I may be doing wrong? Is it really 3.3V logic or should it be less? Is there some power-up sequence that I am not aware of that I should be doing differently than the OV7670?

Any help will be much appreciated. I am really stuck and it is well known that Omnivisions documentation is far from complete.
 

Offline daveshah

  • Supporter
  • ****
  • Posts: 356
  • Country: at
    • Projects
Re: OV5640 help needed! No PCLK signal
« Reply #1 on: July 30, 2016, 06:46:01 am »
I believe the OV5640 needs configuration over SCCB/I2C to get it to do anything - probably at minimum setting the IO pins (Inc. PCLK) as output and setting up the PLLs. I know for a fact that with no config (I was testing one once and accidently swapped SDA and SCL) there was no PCLK.
 

Offline malkaunsTopic starter

  • Contributor
  • Posts: 32
  • Country: us
Re: OV5640 help needed! No PCLK signal
« Reply #2 on: July 30, 2016, 08:12:38 am »
Thanks for your reply.  Do you know what registers need to be set? 
 

Offline amyk

  • Super Contributor
  • ***
  • Posts: 8270
Re: OV5640 help needed! No PCLK signal
« Reply #3 on: July 30, 2016, 03:22:15 pm »
You can read the datasheet for the description of (some, not all) registers, and find some initial sets of working configurations from other's drivers, like this one:

https://github.com/allwinner-ics/lichee_linux-3.0/blob/master/drivers/media/video/sun4i_csi/device/ov5640.c
 

Offline malkaunsTopic starter

  • Contributor
  • Posts: 32
  • Country: us
Re: OV5640 help needed! No PCLK signal
« Reply #4 on: July 31, 2016, 07:38:02 am »
Thanks for all your replies. :)
 

Offline daveshah

  • Supporter
  • ****
  • Posts: 356
  • Country: at
    • Projects
Re: OV5640 help needed! No PCLK signal
« Reply #5 on: July 31, 2016, 10:35:22 am »
I've attached the config I used to run an OV5640 module at 512x480x90fps; with RGB565 output and lens correction. Values are in hex, the first 4 digits are the register address and the final 2 the register value. These were written sequentially and fairly slowly over I2C. My comments are in there and should point out some useful registers; although I can't 100% guarantee they're up to date with the current code.
 
The following users thanked this post: kanuzkhan

Offline malkaunsTopic starter

  • Contributor
  • Posts: 32
  • Country: us
Re: OV5640 help needed! No PCLK signal
« Reply #6 on: August 01, 2016, 07:25:45 am »
Thanks daveshah,  seems I got it working after setting up the PLLs as you stated earlier.  Just have to figure out how to set up and capture at 720p with yuv444 @ 60fps now and I'll be golden!  Please let me know if by any chance you have the register settings for that.  The datasheet can be a challenge to understand.
« Last Edit: August 01, 2016, 07:34:40 am by malkauns »
 

Offline daveshah

  • Supporter
  • ****
  • Posts: 356
  • Country: at
    • Projects
Re: OV5640 help needed! No PCLK signal
« Reply #7 on: August 01, 2016, 07:38:12 am »
Haven't ever tested that exact config but some hints, based off the previous config (all values in hex)
Code: [Select]
720p timings
380e = 03
380f =  F0
(You may need to increase the above for 3-bytes per pixel though; and tweak pixel clock settings...)
3814 = 31
3815 = 31
3808 = 05
3809 = 00
380a = 02
380b = D0

YUV444
4300 = 20
501F = 00

EDIT: You might also need to change the value of 3824 to adjust the pixel clock for 3 bytes per pixel; can't remember how though. Otherwise increasing HTS (380e/380f) to something above 720*3 plus some padding might be enough.

Good luck, from my experience of the OV5640 you'll need it  :)

Also as a random aside I've found some OV5640s (2 worked well out of a batch of 4; 2 had some glitched lines) overclock well; I was able to get 135fps with a 1.5x scaled input clock but otherwise the same config as before.
« Last Edit: August 01, 2016, 07:41:00 am by daveshah »
 

Offline malkaunsTopic starter

  • Contributor
  • Posts: 32
  • Country: us
Re: OV5640 help needed! No PCLK signal
« Reply #8 on: August 01, 2016, 07:48:56 am »
Wow, thanks for your lightning reply.  135fps for 720p?  Weren't there any heat issues?  What exactly determines the fps?  Is it just a combination of your input clock (XCLK) and your multiplier/divider?  Also, what does "Total horizontal size" etc. mean according to the datasheet?  I see that you are setting these with the values you just posted.  Thanks for your attention.
 

Offline daveshah

  • Supporter
  • ****
  • Posts: 356
  • Country: at
    • Projects
Re: OV5640 help needed! No PCLK signal
« Reply #9 on: August 01, 2016, 08:56:27 am »
Wow, thanks for your lightning reply.  135fps for 720p?  Weren't there any heat issues?  What exactly determines the fps?  Is it just a combination of your input clock (XCLK) and your multiplier/divider?  Also, what does "Total horizontal size" etc. mean according to the datasheet?  I see that you are setting these with the values you just posted.  Thanks for your attention.

135fps for 512x480 (should also work at 640x480), not 720p unfortunately. Yes they got warm but I wouldn't say worryingly so (I was using fairly beefy external 1.5V regulator). XCLK was 36MHz, PLL config was as in the text file I attached.

 Total horizontal size (380c/380d, not 380e/380f as I erroneously stated previously) is the number of PCLKs (not pixels I believe...) per line (don't hold me to that though); total vertical size (380e/380f) is number of lines including padding per frame. It's total horizontal size that you'll probably need to fiddle with to get 720p YUV444 to work.

Forgot to mention, the settings in that code box for 720p were changes to the text file attached previously, not a complete config in its own right.
 

Offline malkaunsTopic starter

  • Contributor
  • Posts: 32
  • Country: us
Re: OV5640 help needed! No PCLK signal
« Reply #10 on: August 01, 2016, 10:07:40 pm »
Am I right in saying that in your example above where (380E = 03, 380F = F0) these two registers hold together a 16 bit value equaling 1008 (0x03F0))?  So the vertical resolution is set to 1008?  For a horizontal resolution of 1280 pixels in YUV444 format I would need a PCLK value of (1280*3)=3840 (0x0F00)?  Therefore I should set the following registers to (0x0F00): 380C = 0x0F, 380D = 0x00?
 

Offline daveshah

  • Supporter
  • ****
  • Posts: 356
  • Country: at
    • Projects
Re: OV5640 help needed! No PCLK signal
« Reply #11 on: August 02, 2016, 10:32:29 am »
Am I right in saying that in your example above where (380E = 03, 380F = F0) these two registers hold together a 16 bit value equaling 1008 (0x03F0))?  So the vertical resolution is set to 1008?  For a horizontal resolution of 1280 pixels in YUV444 format I would need a PCLK value of (1280*3)=3840 (0x0F00)?  Therefore I should set the following registers to (0x0F00): 380C = 0x0F, 380D = 0x00?

Yes, you are correct. I'm not 100% sure about the HTS part - you'll have to experiment - but I belive some padding may be needed so maybe start with something like 3999?
 

Offline Scrts

  • Frequent Contributor
  • **
  • Posts: 797
  • Country: lt
Re: OV5640 help needed! No PCLK signal
« Reply #12 on: August 02, 2016, 01:30:30 pm »
Just for the thread usefulness: OV5640 datasheet
 

Offline amyk

  • Super Contributor
  • ***
  • Posts: 8270
Re: OV5640 help needed! No PCLK signal
« Reply #13 on: August 03, 2016, 02:17:29 am »
 

Offline malkaunsTopic starter

  • Contributor
  • Posts: 32
  • Country: us
Re: OV5640 help needed! No PCLK signal
« Reply #14 on: August 03, 2016, 04:34:35 am »
Is there anything particularly different about this "Newer datasheet" ? :)
 

Offline malkaunsTopic starter

  • Contributor
  • Posts: 32
  • Country: us
Re: OV5640 help needed! No PCLK signal
« Reply #15 on: August 04, 2016, 09:03:50 pm »
Hi all!  Thanks for your help so far but I'm having some trouble understanding how these registers work.  What exactly does TIMING HTS/VTS (regs: 0x380C - 0x380F) mean?  Is it the horizontal/vertical size in pixels or bytes (PCLK's)?  How is this related to TIMING DVPHO (regs: 0x3808 - 0x380B)?  Also what exactly affects the framerate?  Do I simply increase my XCLK to increase frames per second?  Hopefully someone can clear my confusion.
 

Offline Scrts

  • Frequent Contributor
  • **
  • Posts: 797
  • Country: lt
Re: OV5640 help needed! No PCLK signal
« Reply #16 on: August 05, 2016, 12:10:12 pm »
HTS - Horizontal Total Size, VTS - Vertical Total Size. Both of these include blanking periods I think.
In order to adjust FPS, you set the frame size and adjust the PLL settings for pixel clock. It also depends what output type you use. If it's YUV422, then you need to double the pixel clock, since one byte is pushed out through DVP interface Y,U,Y,V sequence.
 

Offline malkaunsTopic starter

  • Contributor
  • Posts: 32
  • Country: us
Re: OV5640 help needed! No PCLK signal
« Reply #17 on: August 06, 2016, 06:04:24 am »
I'm not sure what is meant by "blanking periods".  What should these be set to for 720p YUV444?  I have tried register settings from various places for this sensor but nothing seems to be giving me the expected VSYNC, HREF, PCLK signals.
 

Offline Scrts

  • Frequent Contributor
  • **
  • Posts: 797
  • Country: lt
Re: OV5640 help needed! No PCLK signal
« Reply #18 on: August 08, 2016, 01:03:54 pm »
I'm not sure what is meant by "blanking periods".  What should these be set to for 720p YUV444?  I have tried register settings from various places for this sensor but nothing seems to be giving me the expected VSYNC, HREF, PCLK signals.

As per SMPTE 296M-2001, for 1280 × 720, you need to have HTS=1650 and VTS=750 for 60FPS.
 

Offline kanuzkhan

  • Newbie
  • Posts: 2
  • Country: pk
Re: OV5640 help needed! No PCLK signal
« Reply #19 on: December 28, 2023, 12:21:31 pm »
so here 8mhz was the input clock you provided from the controller?? really stuck with this
 

Offline kanuzkhan

  • Newbie
  • Posts: 2
  • Country: pk
Re: OV5640 help needed! No PCLK signal
« Reply #20 on: December 28, 2023, 12:23:47 pm »
the part in the text file where you've used 8*105 to find the pixel clock frequency here 8 is the input clock signal through dcmi to ov5640 or something else? what does the 8 represent here
 


Share me

Digg  Facebook  SlashDot  Delicious  Technorati  Twitter  Google  Yahoo
Smf