We may be arguing two diverse sets of experiences.
I see your experience has been with what sounds like significant field failures.
Where mine has been, over the course of 30 years, dramatic reductions across the
board in field failure. Memory to micro to analog. In early part of my career, 45 years
ago, as a production engineer on MOS line, we drove process and design failure rates
into noise levels. The Japanese did the same in memory. In my experience the primary
remaining failures these days are passives and interconnect. I repair scopes, other
gear for fun, spend most of my time on passives, and an occasion power bipolar, or diode.
The NASA reference, my career spanned primarily moderate to very high volume
designs. But as a field engineer I did have to deal with product obsolescence issues,
and these took many paths, from your experience to true EOL product termination and
follow on redesign.
Product diversification,for sure I can understand your point. But then silicon programmability,
route-ability, can certainly aid in this. Here my experience has been that designs were largely
3 -5 year lifetime target, then entire redesign. In my account base as FAE most, not all, of
product span was software driven. In fact many designs the HW was almost irrelevant in the
program management, it was all software development.
So I think we have quite different experiences coloring our viewpoint, at least in my case
that is surely true.
So in summary I tend to think minimum parts, get rid of interconnect.
Regards, Dana.
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