Author Topic: PIC18: Issues with SPI  (Read 5563 times)

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Offline yashrkTopic starter

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PIC18: Issues with SPI
« on: May 05, 2017, 06:26:23 am »
Hey guys,
                 I am working with PIC18F4620 micro in MPLAB with XC8 compiler below is the code I have written to initialize SPI. In the code i am trying to generate clock pluses by continuously sending 0xAA to the SPI output and I am simulating this code in PIC18 simulator, but I am not getting any signal on either of the pins (clk or the DO) and similarly I am also not getting any signal on the IC too. In simulation it is stuck at SSPSTAT --> BF waiting for it to go high and even if I set the flag high in simulation manually it still won't generate any clock signal.   |O
                 There must be some silly mistake that I might have made please have a look.

Code: [Select]
#include <xc.h>
#include <stdlib.h>
#include <stdio.h>
#include <stdint.h>
#include <math.h>


// PIC18F4620 Configuration Bit Settings

// 'C' source line config statements

#pragma config CONFIG1H = 0x06
#pragma config CONFIG2L = 0x1a
#pragma config CONFIG2H = 0x0e
#pragma config CONFIG3H = 0x81
#pragma config CONFIG4L = 0x80
#pragma config CONFIG5L = 0x00
#pragma config CONFIG5H = 0x00
#pragma config CONFIG6L = 0x0f
#pragma config CONFIG6H = 0xe0
#pragma config CONFIG7L = 0x0f
#pragma config CONFIG7H = 0x40
               
#define _XTAL_FREQ 40000000

#define CS_PIN         PORTCbits.RC2 //3     // Chip Select
#define TRIS_CS_PIN    TRISCbits.TRISC2
#define DIN_PIN        PORTCbits.RC4     // Data in
#define TRIS_DIN_PIN   TRISCbits.TRISC4
#define DOUT_PIN       PORTCbits.RC5 //6    // Data out
#define TRIS_DOUT_PIN  TRISCbits.TRISC5
#define SCK_PIN        PORTCbits.RC3 //5    // Clock
#define TRIS_SCK_PIN   TRISCbits.TRISC3

//void SerTx(unsigned char);
void RC_ISR(void);

void Int_CON();
void interrupt low_priority chk_low_isr(void);
void interrupt high_priority chk_high_isr(void);

void latch_enable(int8_t rb_latch);

void config_spi(void);
unsigned char write_spi(unsigned char mybyte);
unsigned char read_spi(void);

void adcReset(void);
void readch();

void main(){
    TRISB =0x00;                        // lcd 0-7
    TRISD =0x00;                        // D6, D7
    TRISC = 0b10010011;
    TRISE =0b101;
    PORTEbits.RE1 = 0;
    PORTB =0x00;
    PORTD =0x00;
   
    latch_enable(0);
    ADCON0 = 0x00;                      // all pins digital

   
    unsigned char data='a';
    config_spi();

   
    while(1) write_spi(0xAA);
}

void interrupt low_priority chk_low_isr(void){
    if(PIR1bits.RCIF == 1)
        RC_ISR();
}

void interrupt high_priority chk_high_isr(void){
}

void Int_CON(){                  // Interrupt configuration
   
    PIE1bits.RCIE =1;           // enable REC interrupt
    IPR1bits.RCIP = 0;              //Serial I/P priority LOW
   
    PIE1bits.TMR1IE =1;         //enable timer1 interrupt
    IPR1bits.TMR1IP = 0;        //timer1 priority low
    T1CON = 0b10110100;         
   
//    PIE1bits.TXIE =1;           // enable TX interrupt
    RCONbits.IPEN =1;
    INTCONbits.PEIE =1;         // enable peripheral interrupts
    INTCONbits.GIEH =1;          // enable all interrupts globals
    INTCONbits.GIEL =1;
   
}

void config_spi(void){
    CS_PIN        = 0;     // Chip Select
    TRIS_CS_PIN   = 0;
    TRIS_DIN_PIN  = 1;
    TRIS_DOUT_PIN = 0;
    TRIS_SCK_PIN  = 0;
    SSPSTAT =0;
    SSPCON1 =0x22;
}

unsigned char write_spi(unsigned char mybyte){
    SSPBUF = mybyte;
    while(!SSPSTATbits.BF);
    return SSPBUF;
}

unsigned char read_spi(void){
    while(!SSPSTATbits.BF);
    return SSPBUF;
}
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Offline JPortici

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Re: PIC18: Issues with SPI
« Reply #1 on: May 05, 2017, 09:39:58 am »
i wouldn't expect it to work with the simulator

with the chip: the state of the other bits?
write collision?
interrupt flag?

i also suggest you to check the errata document
« Last Edit: May 05, 2017, 09:42:36 am by JPortici »
 

Offline yashrkTopic starter

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Re: PIC18: Issues with SPI
« Reply #2 on: May 05, 2017, 09:52:14 am »
i wouldn't expect it to work with the simulator

with the chip: the state of the other bits?
write collision?
interrupt flag?

i also suggest you to check the errata document

Yeah I programmed it too but no signal on the pin I checked, I added collision detection in spi_write now, but at least ones the clock or data line should go high (which it is not) and I am not using Interrupts for it
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Offline MarkF

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Re: PIC18: Issues with SPI
« Reply #3 on: May 05, 2017, 10:47:34 am »
Why so complex? You don't need interrupts at all unless you're trying to have a specific time between 8-bit transfers. Are you trying to do SPI I/O or are you trying to generate a clock. This is NO way to generate a clock.

This is what I do for a pic18f2550:

Code: [Select]
void main(void)
{
   while (1) {
      sendSPI(0xAA);
   }
}

void sendSPI(uint8_t cmd)
{
   uint8_t  tmp;

   DCpin = 0;
   CSpin = 0;
   PIR1bits.SSPIF=0;  SSPBUF=cmd;  while ( !PIR1bits.SSPIF );  tmp=SSPBUF;
   CSpin = 1;
}

I believe there is a problem with using the BF status bit for your pic18. See the Errata for your PIC.
If you really want to use interrupts, I'll give you an example of what I do.
 

Offline JPortici

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Re: PIC18: Issues with SPI
« Reply #4 on: May 05, 2017, 11:27:48 am »
the interrupt flag is asserted regardless that if you have enabled or not the interrupt.
-SSPIF = 0
-send data
-while(!SSPIF)

but the fact that you are not seeing any clock edges makes me think that something else is going on
 

Offline pelule

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Re: PIC18: Issues with SPI
« Reply #5 on: May 05, 2017, 01:22:59 pm »
Where is the flag cleared after it was set?
/pelule
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Offline yashrkTopic starter

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Re: PIC18: Issues with SPI
« Reply #6 on: May 05, 2017, 05:08:14 pm »
the interrupt flag is asserted regardless that if you have enabled or not the interrupt.
-SSPIF = 0
-send data
-while(!SSPIF)

but the fact that you are not seeing any clock edges makes me think that something else is going on

I did that now it is stuck waiting for flag to go high
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Offline NorthGuy

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Re: PIC18: Issues with SPI
« Reply #7 on: May 05, 2017, 06:25:39 pm »
The code looks more or less Ok (except for read_spi() which doesn't get called anywhay).

Chances are your PIC doesn't run at all because of a crystal problem or such.

It is also possible that you do something harmful in your latch_enable() function (which is called from main(), but is not included with the code you posted), such as enabling unhandled interrupts.
 

Offline yashrkTopic starter

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Re: PIC18: Issues with SPI
« Reply #8 on: May 06, 2017, 03:51:34 am »
Can anyone give me a example SPI code for this which might run on this IC, I do know I am asking too much but I have tried everything and it is still not working.
The problems mention above say with latch_enable and unhandled interrupts where eliminated when I just striped down the code to the functions which were needed for SPI  (i.e. I also removed the interrupts intialization and other unnecessary things from the code shown above)   :palm:
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Offline NorthGuy

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Re: PIC18: Issues with SPI
« Reply #9 on: May 08, 2017, 04:43:57 am »
Your code does look Ok. These old chips had lots of idiosyncrasies, so there may be something chip dependent. There's an erratum which says that you need to wait one SPI clock before writing to SSPBUF after the reception, but it shouldn't apply to you.

By the sympthoms, looks like MSSP is either disabled, or not in the master mode. You can try couple things, but chances they may help are slim to none.

1. You can set TRIS for the CLK pin to 1.

2. You can split master mode setting from enabling:

Code: [Select]
SSPCON1 = 0x2; // set master mode
SSPCON1bits.SSPEN = 1; // enable

There are also strange comments in your code:

Code: [Select]
#define DOUT_PIN       PORTCbits.RC5 //6    // Data out
#define SCK_PIN        PORTCbits.RC3 //5    // Clock

Hopefully "5" and "6" are not the pin numbers you expect to work.

 

Offline yashrkTopic starter

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Re: PIC18: Issues with SPI
« Reply #10 on: May 10, 2017, 05:49:50 am »
Your code does look Ok. These old chips had lots of idiosyncrasies, so there may be something chip dependent. There's an erratum which says that you need to wait one SPI clock before writing to SSPBUF after the reception, but it shouldn't apply to you.

By the sympthoms, looks like MSSP is either disabled, or not in the master mode. You can try couple things, but chances they may help are slim to none.

1. You can set TRIS for the CLK pin to 1.

2. You can split master mode setting from enabling:

Code: [Select]
SSPCON1 = 0x2; // set master mode
SSPCON1bits.SSPEN = 1; // enable

There are also strange comments in your code:

Code: [Select]
#define DOUT_PIN       PORTCbits.RC5 //6    // Data out
#define SCK_PIN        PORTCbits.RC3 //5    // Clock

Hopefully "5" and "6" are not the pin numbers you expect to work.



Ya it didn't helped, hard luck  :(

And no I don't expect 5, 6 to work
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Offline Howardlong

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Re: PIC18: Issues with SPI
« Reply #11 on: May 10, 2017, 10:24:40 am »
This simple code works on the MSSP on the PIC24F series, I wired the SDO1 to SDI1 for hardware loopback to self-test. I can confirm that the simulator doesn't work, you need real hardware.

Code: [Select]
#pragma config FNOSC = FRCPLL           // Oscillator Select (Fast RC Oscillator with Postscaler and PLL Module (FRCDIV+PLL))
#pragma config FWDTEN = OFF             // Watchdog Timer Enable bits (WDT disabled in hardware; SWDTEN bit disabled)

#include <xc.h>
#define FCY 16000000
#include <libpic30.h>
#include <stdint.h>

#define BUFFERSIZE 8

static const uint8_t _au8Tx[BUFFERSIZE]={0x55,0xAA,0x11,0x88,0x22,0x44,0xFF,0x00};
static uint8_t _au8Rx[BUFFERSIZE];

int main(void)
{
int i;

CLKDIVbits.RCDIV=0b000; // 0b000 -> div-by-1 before FRCPLL for 16MHz Fcy

SSP1CON1=0; // Disable module for configuration
SSP1CON1bits.SSPM=0b0010; // Bit clock=Fcy/16
// SSP1CON1bits.SSPM=0b0001; // Bit clock=Fcy/4
// SSP1CON1bits.SSPM=0b0000; // Bit clock=Fcy
SSP1CON1bits.SSPEN=1;

for (i=0;i<BUFFERSIZE;i++)
{
SSP1BUF=_au8Tx[i];

while (SSP1STATbits.BF==0)
{
Nop();
}
_au8Rx[i]=SSP1BUF;
}

while (1)
{
Nop();
}
}

I have re-coded/refactored it for the MSSP on the PIC18F4620, but I don't have any silicon with me to test as I'm out and about today. I have some PIC18F2620 back in the lab which are the same device but in 28 pin package which I can try for you later. Here's the code for now that you could try. Again, the simulator doesn't work with the MSSP for this device either.

Code: [Select]
//#pragma config OSC = INTIO67    // Oscillator Selection bits (Internal oscillator block, port function on RA6 and RA7)
#pragma config OSC = INTIO7     // Oscillator Selection bits (Internal oscillator block, CLKOUT function on RA6, port function on RA7)
#pragma config PWRT = OFF       // Power-up Timer Enable bit (PWRT disabled)
#pragma config WDT = OFF        // Watchdog Timer Enable bit (WDT disabled (control is placed on the SWDTEN bit))
#pragma config MCLRE = ON       // MCLR Pin Enable bit (MCLR pin enabled; RE3 input pin disabled)
#pragma config LVP = OFF        // Single-Supply ICSP Enable bit (Single-Supply ICSP disabled)

#include <xc.h>
#include <stdint.h>

#define BUFFERSIZE 8

static const uint8_t _au8Tx[BUFFERSIZE]={0x55,0xAA,0x11,0x88,0x22,0x44,0xFF,0x00};
static uint8_t _au8Rx[BUFFERSIZE];

int main(void)
{
    int i;
   
    OSCCONbits.IRCF=0b111; // 0b111 -> div-by-1 8MHz internal clock
   
    // CS_ pin setup for master mode
    LATAbits.LATA5=1; // SS_ disabled
    TRISAbits.TRISA5=0; // RA5 & SS_ on the same pin, in master mode we need to manually assert
   
    // SCK pin setup for master mode
    LATCbits.LATC3=0;
    TRISCbits.TRISC3=0; // RC3 & SCK on same pin, TRIS bit needs setting to output for master mode
   
    SSPCON1=0; // Disable module for configuration
// SSPCON1bits.SSPM=0b0010; // Bit clock=Fcy/16
// SSPCON1bits.SSPM=0b0001; // Bit clock=Fcy/4
SSPCON1bits.SSPM=0b0000; // Bit clock=Fcy
SSPCON1bits.SSPEN=1;

    LATAbits.LATA5=0; // Assert CS_
for (i=0;i<BUFFERSIZE;i++)
{
SSPBUF=_au8Tx[i];

while (SSPSTATbits.BF==0)
{
Nop();
}
_au8Rx[i]=SSPBUF;
}
    LATAbits.LATA5=1; // Deassert CS_

    while (1)
    {
        Nop();
    }
    return;
}

Edit: In my experience, the simulator is of very limited use for real world development.

For a limited number of things, such as optimizing number crunching during unit testing, it can be quite useful, as the cycle calculations are generally reliable, but keep in mind that higher end PIC32 devices with cache and wait states won't give you realistic cycle times.

For anything real world, in real time scenarios with external stimulus, or when using non-trivial peripherals, the simulator is next to useless and you need real hardware.

One final thing, always keep things as simple as possible to begin with, and build incrementally on top. In particular, avoid things like interrupts, FIFO and DMA to start with. If you can't get a simple polling solution to work during prototype unit testing, I guarantee you'll never get those more complicated concepts to work, they just complicate things and cloud the issue.
« Last Edit: May 10, 2017, 06:12:37 pm by Howardlong »
 

Offline Howardlong

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Re: PIC18: Issues with SPI
« Reply #12 on: May 10, 2017, 06:18:38 pm »
Please note I just updated the second code segment in the previous post with working code on a hardware PIC18F2620, the 28 pin version of your device, so it should "just work" on your larger PIC18F4620 device.

I made the following modifications:

o TRISC3=0 to enable the master SCK output
o LATA5/TRISA5 master CS_ control (the MSSP does not generate CS_ in master mode)
o Increased oscillator speed to 8MHz Fosc/2MHZ Fcy using the internal oscillator
o Enabled the Fcy output on RA6 pin

I did fiddle about with the PLL, but it takes about a millisecond to start so I decided that was just complicating things and pulled that code out.
 

Offline yashrkTopic starter

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Re: PIC18: Issues with SPI
« Reply #13 on: May 26, 2017, 06:31:48 am »
I tried your code but no output, it is stuck in " while (SSP1STATbits.BF==0) " loop.

this is the latest now I am working with

Code: [Select]
#include <xc.h>
#include <stdlib.h>
#include <stdio.h>
#include <stdint.h>
#include <math.h>
#include <pic18f4620.h>


// PIC18F4620 Configuration Bit Settings

// CONFIG1H
#pragma config OSC = HSPLL      // Oscillator Selection bits (HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1))
#pragma config FCMEN = OFF      // Fail-Safe Clock Monitor Enable bit (Fail-Safe Clock Monitor disabled)
#pragma config IESO = OFF       // Internal/External Oscillator Switchover bit (Oscillator Switchover mode disabled)

// CONFIG2L
#pragma config PWRT = OFF        // Power-up Timer Enable bit (PWRT enabled)
#pragma config BOREN = ON       // Brown-out Reset Enable bits (Brown-out Reset enabled and controlled by software (SBOREN is enabled))
#pragma config BORV = 3         // Brown Out Reset Voltage bits (Minimum setting)

// CONFIG2H
#pragma config WDT = OFF        // Watchdog Timer Enable bit (WDT disabled (control is placed on the SWDTEN bit))
#pragma config WDTPS = 32768    // Watchdog Timer Postscale Select bits (1:32768)

// CONFIG3H
#pragma config CCP2MX = PORTC   // CCP2 MUX bit (CCP2 input/output is multiplexed with RC1)
#pragma config PBADEN = OFF     // PORTB A/D Enable bit (PORTB<4:0> pins are configured as digital I/O on Reset)
#pragma config LPT1OSC = OFF    // Low-Power Timer1 Oscillator Enable bit (Timer1 configured for higher power operation)
#pragma config MCLRE = ON       // MCLR Pin Enable bit (MCLR pin enabled; RE3 input pin disabled)

// CONFIG4L
#pragma config STVREN = OFF     // Stack Full/Underflow Reset Enable bit (Stack full/underflow will not cause Reset)
#pragma config LVP = OFF        // Single-Supply ICSP Enable bit (Single-Supply ICSP disabled)
#pragma config XINST = OFF      // Extended Instruction Set Enable bit (Instruction set extension and Indexed Addressing mode disabled (Legacy mode))

// CONFIG5L
#pragma config CP0 = OFF        // Code Protection bit (Block 0 (000800-003FFFh) not code-protected)
#pragma config CP1 = OFF        // Code Protection bit (Block 1 (004000-007FFFh) not code-protected)
#pragma config CP2 = OFF        // Code Protection bit (Block 2 (008000-00BFFFh) not code-protected)
#pragma config CP3 = OFF        // Code Protection bit (Block 3 (00C000-00FFFFh) not code-protected)

// CONFIG5H
#pragma config CPB = OFF        // Boot Block Code Protection bit (Boot block (000000-0007FFh) not code-protected)
#pragma config CPD = OFF        // Data EEPROM Code Protection bit (Data EEPROM not code-protected)

// CONFIG6L
#pragma config WRT0 = OFF       // Write Protection bit (Block 0 (000800-003FFFh) not write-protected)
#pragma config WRT1 = OFF       // Write Protection bit (Block 1 (004000-007FFFh) not write-protected)
#pragma config WRT2 = OFF       // Write Protection bit (Block 2 (008000-00BFFFh) not write-protected)
#pragma config WRT3 = OFF       // Write Protection bit (Block 3 (00C000-00FFFFh) not write-protected)

// CONFIG6H
#pragma config WRTC = OFF       // Configuration Register Write Protection bit (Configuration registers (300000-3000FFh) not write-protected)
#pragma config WRTB = OFF       // Boot Block Write Protection bit (Boot Block (000000-0007FFh) not write-protected)
#pragma config WRTD = OFF       // Data EEPROM Write Protection bit (Data EEPROM not write-protected)

// CONFIG7L
#pragma config EBTR0 = OFF      // Table Read Protection bit (Block 0 (000800-003FFFh) not protected from table reads executed in other blocks)
#pragma config EBTR1 = OFF      // Table Read Protection bit (Block 1 (004000-007FFFh) not protected from table reads executed in other blocks)
#pragma config EBTR2 = OFF      // Table Read Protection bit (Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks)
#pragma config EBTR3 = OFF      // Table Read Protection bit (Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks)

// CONFIG7H
#pragma config EBTRB = OFF      // Boot Block Table Read Protection bit (Boot Block (000000-0007FFh) not protected from table reads executed in other blocks)

           
#define _XTAL_FREQ 40000000

#define CS_PIN         PORTCbits.RC2 //3     // Chip Select
#define TRIS_CS_PIN    TRISCbits.TRISC2
#define DIN_PIN        PORTCbits.RC4     // Data in
#define TRIS_DIN_PIN   TRISCbits.TRISC4
#define DOUT_PIN       PORTCbits.RC5 //6    // Data out
#define TRIS_DOUT_PIN  TRISCbits.TRISC5
#define SCK_PIN        PORTCbits.RC3 //5    // Clock
#define TRIS_SCK_PIN   TRISCbits.TRISC3

void config_spi(void);
unsigned char write_spi(unsigned char mybyte);
unsigned char read_spi(void);

void main(){
    TRISB =0x00;                        // lcd 0-7
    TRISD =0x00;                        // D6, D7
    TRISC = 0b10010011;
    TRISE =0b101;
    PORTEbits.RE1 = 0;
    PORTB =0x00;
    PORTD =0x00;
   
    CS_PIN        = 1;     // Chip Select

    ADCON0 = 0x00;                     
    ADCON1 = 0b00001111;               // all pins digital
       
    unsigned char data='a';
    config_spi();

   
    while(1) write_spi(0xAA);
}


void config_spi(void){
    TRIS_CS_PIN   = 0;
    TRIS_DIN_PIN  = 1;
    TRIS_DOUT_PIN = 0;
    TRIS_SCK_PIN  = 0;
    SSPSTAT =0b10000000;
    //SSPCON1 =0x22;
    SSPCON1 = 0b00100010;
    SSPADD =0x00;
    CS_PIN        = 0;     // Chip Select
}

unsigned char write_spi(unsigned char mybyte){
    SSPCON1bits.WCOL =0;
    PIR1bits.SSPIF =0;
    SSPBUF = mybyte;
    //while(!SSPSTATbits.BF);
    while(!PIR1bits.SSPIF);
    return SSPBUF;
}

unsigned char read_spi(void){
    while(!SSPSTATbits.BF);
    return SSPBUF;
}
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