PIC18F26K22 problem reading PCLATU register

[rollingstone]

Hi, My first post here. Because of this problem I tried several times (and several weeks) to register to Microchip forum but unsuccessfully so I'll try to ask here.
I'm using PIC18F26K22 MCU and PICKIT3 debuger, coding in asembly. And trying to read program counter upper byte (PCLATU) register value. It works fine in simulator, but not with real hardware. I use instructions:
MOVF PCLATU, 0 or
MOVFF PCLATU, WREG or
MOVFF PCLATU, FF (move value from PCLATU to any other file)
And that does not work with real hardware (target registers are not updated with PCLATU value). I have no problem reading other PC registers (PCL, PCLATH). But with PCLATU I can only write the value to it. What I'm doing wrong? Datasheet does not say anything about not being able to read from it. Also I googled few days and looked many forums, but  no luck.
Thanx for any help.

[JPortici]

AH! Registering on the microchip forum (and brosing it sometimes)
Disable adblock/noscript and the such. the posting form didn't work with "https always" for example
Try with different browsers (Internet explorer should work with no issues )
Or register using your Google+ credentials (the only useful thing so far)

what are you trying to accomplish exactly?

[JTR]

The PIC18F26K22 is a 64Kb device. It doesn't use PCLATU...

[rollingstone]

With microchip forum i just don't receive registration confirmation, tried "resend activation confirmation" option dozen times, no luck. May be I should try new email and user address.
With that MCU I'm trying to store messages in program memory using "DA" directive and then send them using table pointers to program memory (TBLPTL, TBPTRH, TBPTRU) to USART.
So when my program runs to the point where i want to transmitt my message to USART,
 I do it by first assigning PC register values to table pointer values:

MOVFF   PCL,        TBLPTRL 
MOVFF   PCLATH,   TBLPTRH
MOVFF   PCLATU,   TBLPTRU

And then after that i use DA directive to write my message to program flash memory (right where PC is pointing at):

da "\x02\r\n"                                                 ; x02 symbol indicates start of message
da "Change device name error ocured!\r\n"     ; actual message
da "And don't worry\r\n"                                 ; actual message
da "And be happy\r\n"                                    ; actual message   
da "\x03"                                                       ; x03 symbol indicates end of message

And then i call subprogram to transmit message from that place (where PC was pointing at) from begining (002h symbol) to the end (003h symbol) of message:

CALL USART_MSG_TX

And everything works fine, except THAT problem. Instead of doing it normal way (MOVFF   PCLATU,   TBLPTRU) i can write to TBLPTRU register value manualy. But then I will have to worry because it's value will depend on where in the program memory space this subprogram sits.

[rollingstone]

if The PIC18F26K22 is a 64Kb device and It doesn't use PCLATU…
  Then why PCLATU register is on datasheet and i can see it in register list when debuging and can write to it and it's value is updated?
And of course i checked include file and it also has PCLATU register definition with address FFBh which is right according to datasheet. 

[picandmix]

Will have to look at the PCLATU in the datasheet, but in the meantime have you ? or why don't you run your program via the Pickit3 in Debugger mode and use breakpoints to just before those instructions , then single step through then while 'watching' those registers in Mplab .

[picandmix]

A while since I played around with those registers but  looking at some old working code I used the Table Pointers, section 6.2 of the datasheet with the DB directive,brief example below.
Saves messing with the PC register which can be all to easy to screw up.

Code: [Select]

movlw high textl ; load text1 H address to tbptrH
movwf TBLPTRH
movlw upper textl ; load text1 U address
movwf TBLPTRU
  movlw low textl ; load text1 L address to tbptrL
movwf TBLPTRL


text1

db "1234567890!£$%&*", 0

[JTR]

if The PIC18F26K22 is a 64Kb device and It doesn't use PCLATU…
  Then why PCLATU register is on datasheet and i can see it in register list when debuging and can write to it and it's value is updated?
And of course i checked include file and it also has PCLATU register definition with address FFBh which is right according to datasheet.

Because PCLATU is used on other family members with more memory. For any PIC18 with 64KB code space or less PCLATU is simply not required for user code. Even if it is there inside the silicon it will always be set to 0 on POR and every time the PCL SPR is read.  Given a PIC18 with <=64KB The only time it may be used is with code that is located in a non user space like the debug executive. I cannot remember if the PIC18 uses a separate test area for the debug executive or not. The point is that for user code it is only used when you have > 64KB of code space.

The PCLATU SPR is doecumented to exist in all PIC18 data sheets even when it has no functional role. It is there as a redundant "super set" feature and its usefulness is to be inferred by context.

[rollingstone]

Thanx JPortici, JTR and picandmix for help, I just ignored PCLATU register and everything is working now  . When debuging step by step it was very confusing to see a value 20h in this register, so I thought I have also to write that value to TBLPTRU register. It is strange that datasheet doesn't say anything about uselessness of this register. and I'm was not that genius to understand this "by default", so thank you for clearing this out. I Also used code provided by picandmix  and it is much nicer way than moving values from PC register.

[picandmix]

I tried several times (and several weeks) to register to Microchip forum but unsuccessfully so I'll try to ask here.

You do not need to worry about not being able to get in to the Microchip forum as there are quiet a few folk from that forum here in EEvblog.
I do not know all of them, but have spotted ian.m, who, if the same guy, is a very experienced and well thought after microchip forum member, who will surely be able to help out with assembly and more.

[rollingstone]

Thanx picandmix, I really starting to like this place  Not that MICROCHIP rubish 

[picandmix]

A few beginner tips about the 18K series that you might find useful.

The original 18F chips like the popular 4520/ 4550 contained all the systems registers in one fixed area of Ram bank 15 , known as the Access bank.
This avoided the earlier 16F problems of frequently having to change banks for the system registers.

However on the 18K series and newer chips with so many extra functions, they have had to extend that area for the system registers.
Sadly, and for reasons I do not know, these extra register below 0xF60 have to be manually address by selecting bank 15.
While most of these registers will only used during more advanced work, the Analogue Select registers are also in there so you will need to set them accordingly, as the Ports power on defaults are Analogue.

Example -

        movlb   0xf                 ; set Bank Select Register to 15
        movlw   0x00            ; set Port to Digital
        movwf   ANSELA
        movwf   ANSELB
        movwf   ANSELC
        movwf   ANSELD
        movwf   ANSELE

        movlb   0x1                 ; Set BSR to 1


When looking at other code examples of 18F you will find its code is generally portable, but here are 2 examples of  slight differences, to the 18K series

;OSCON
    ;movlw   b'01010010'          ; 45K22 CHANGED TO 0101 = 4MEG
    ;movwf   OSCCON               ; set internal osc to 4 mhz

    ; TIMER1 AS RTC
    ; T1CON paramenter layout slightly different
   ;movlw   b'10001101'         ; configure for ext clock and Turn ON Timer1
   ;movwf   T1CON


Following on from your above point of addressing Program Memory;  in Ram you can similarly address large areas by means of the File Select Registers

Example -

ramclr   movlb   D'1'                    ; define bank1,
             clrf   FSR1H     ; FSR routine to clear ram banks 0 -4 only
             clrf   FSR1L   
   
clrram   clrf   POSTINC1       ; clear location and inc
           movlw   0x05       ; now in bank5
            subwf   FSR1H,W
           bnz      clrram    ; carry on clearing if not at bank5