Author Topic: PIC24EP problem, double rmw to io register fails  (Read 5581 times)

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Offline fourtytwo42Topic starter

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PIC24EP problem, double rmw to io register fails
« on: February 25, 2018, 04:50:39 pm »
For example if you use bset twice to the same io register (different bits) sometimes it fails and not always the second! In my particular case this is to a register within the HSPWM so may be specific to that peripheral. Adding a nop or two between sucsessive rmw's doesnt work so the only alternative when bit twiddling multiple bits is do it in a shadow register and load it in a single mov, that works :)

I hope this helps others rather than attract unwarented comments. This is not in the Errata.
 

Offline kony

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Re: PIC24EP problem, double rmw to io register fails
« Reply #1 on: February 25, 2018, 05:14:50 pm »
Are you sure you are witing to the output shadow register and not the port I/O one? Similar thing happens with 18F families, write to PORTx sometimes works, but as it is R/M/W with the actual values present on the I/O port, it can go corrupt if something pulls or glitches the output value at the time of execution of the instruction. Hence why shadow output LATx register set is present (which gets automatically copied to PORTx enabled outputs).
 

Offline fourtytwo42Topic starter

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Re: PIC24EP problem, double rmw to io register fails
« Reply #2 on: February 25, 2018, 05:41:46 pm »
Sorry I did clearly state "register within the HSPWM" nothing to do with port i/o. It is however an io register with respect to the cpu, i.e. not a cpu core register, hope that clarifies things :)
 

Offline Benta

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Re: PIC24EP problem, double rmw to io register fails
« Reply #3 on: February 25, 2018, 08:06:51 pm »
Back in the early 80s when I learned coding (assembler in those days), I got burned so bad using RMW instructions on peripherals, that I made myself a promise never to do that again.
If I use an RMW, then only on RAM, and only on single-CPU systems.

One issue is, that just reading values from a peripheral can change the value. As an example, reading an interrupt register clears the interrupt, because the peripheral interprets this as the interrupt being serviced (which is correct from the peripheral's point of view).

I suggest you do atomic reads, modifies and writes, because only in that way are you in control of what happens.

Compilers usually do the same, by the way.

 

Offline fourtytwo42Topic starter

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Re: PIC24EP problem, double rmw to io register fails
« Reply #4 on: February 26, 2018, 07:46:50 pm »
Thank you for your insight, as an assembler programmer I tend to make full use of the offered instruction set and get a bit peeved when it doesnt work! However in the case of this processor the peripherals run at half the core clock speed so I am not entirely suprised at the defect.  Given Microchip seem to have abandoned assembly programmers (see peoples comments about MPLAB-X etc) I would expect all there testing is performed using C and as you pointed out the compiler avoids rmw. rmw is a heavely used construct particuarly in multiprocessing for indivisable lock flags so given C compilers apparently avoid this at all times some programming problems must prove interesting :)
 

Offline andersm

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Re: PIC24EP problem, double rmw to io register fails
« Reply #5 on: February 26, 2018, 08:12:05 pm »
Does it help if you read back the register after writing (or at least before the next write)? That functions as a workaround for bus synchronization issues on some devices.

Offline Benta

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Re: PIC24EP problem, double rmw to io register fails
« Reply #6 on: February 26, 2018, 08:28:39 pm »
rmw is a heavely used construct particuarly in multiprocessing for indivisable lock flags so given C compilers apparently avoid this at all times some programming problems must prove interesting :)

This is not quite true. CPU architects are aware of this issue and have evolved special RMW instructions for multiprocessor systems.
For example, the M68k architecture provides the TAS instruction, which is an indivisible RMW, meaning it locks the bus until it completes. This is in contrast to normal RMWs (like BSET), where bus arbitration may happen during instruction execution (and subsequent catastrophic results).
 

Offline fourtytwo42Topic starter

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Re: PIC24EP problem, double rmw to io register fails
« Reply #7 on: February 26, 2018, 08:39:54 pm »
I must confess as the indivisability of the rmw was not an issue in this application I didnt spend a lot of time investigating it further. I can say by observation a 3rd rmw some long time after the first two adgacent ones flushes the missing write of whichever failed, very mysterious indeed but not having a description of there synchroniser it's difficult to imagine the circumstances. The failure rate is also quite random, it is however very typical of a metastable condition oops!!
If you wish to try testing this try using bset & bclr on pairs of bits in the PWM IOCONx register specifically the OVRDAT bits, you need a scope on the PWMx outputs to see the problem, I am running the cpu at ~40Mips.
 

Offline fourtytwo42Topic starter

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Re: PIC24EP problem, double rmw to io register fails
« Reply #8 on: February 26, 2018, 08:55:45 pm »
rmw is a heavely used construct particuarly in multiprocessing for indivisable lock flags so given C compilers apparently avoid this at all times some programming problems must prove interesting :)

This is not quite true. CPU architects are aware of this issue and have evolved special RMW instructions for multiprocessor systems.
For example, the M68k architecture provides the TAS instruction, which is an indivisible RMW, meaning it locks the bus until it completes. This is in contrast to normal RMWs (like BSET), where bus arbitration may happen during instruction execution (and subsequent catastrophic results).
Yes well Microchip are long past the point where they provide such detailed information to there users, however in this case where only a single processor is in use and there is no other active bus master the rmw has clearly failed due to the intracasies of there synchronisation logic nececiated by the core running at twice the peripheral frequency. To muddy the waters with what compilers do or not and other processor architectures does not help others to be warned about the simple point I have outlined.
 

Offline Benta

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Re: PIC24EP problem, double rmw to io register fails
« Reply #9 on: February 26, 2018, 10:04:36 pm »
42, if you are pissed off at the PICs, I understand you. In my personal opinion they were always crap.
But the best parts don't always win. PICs are popular because Microchip marketing catered to hobbyists and students, the big players ignored them. Students turn into engineers, though. And suddenly PICs are mainstream.

I still think they are not well designed and would never use one myself.

Feel better? Probably not, but you now know my opinion.
« Last Edit: February 26, 2018, 10:46:20 pm by Benta »
 

Offline Bruce Abbott

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Re: PIC24EP problem, double rmw to io register fails
« Reply #10 on: February 26, 2018, 10:18:41 pm »
For example if you use bset twice to the same io register (different bits) sometimes it fails and not always the second! In my particular case this is to a register within the HSPWM
Which PIC24EP, and can you show us the code that fails? How often does it fail?

 
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Offline Howardlong

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Re: PIC24EP problem, double rmw to io register fails
« Reply #11 on: February 26, 2018, 11:12:01 pm »
Happy to try it here, I have both PIC24EP256GP202 and PIC24EP256MC202 in stock if that helps. I have EP series with a larger numbers of pins in stock but they're less easy to breadboard.

Are you saying the RMW just is not working, or that the peripheral takes no notice of the setting?

I am wary of setting out on writing my own PWM code on this device as this specific PWM peripheral is very complex: I did some work on a dsPIC33 with a similar PWM peripheral a couple of years ago, it takes a lot of time to understand and get right. Happy to try your example code.

What I do note, if it's a PIC24EPXXXMC20X, that there's a config bit PWMLOCK that locks you out of changing the IOCONx and FCLCONx registers unless you write 0xABCD and 0x4321 to the PWMKEY register first. Section 16.1.2 of the datasheet, DS70000657H, page 226.

The code below I tested on a PIC24EP256MC202 and it won't set the bit on the register unless I compile the code with #pragma config PWMLOCK = OFF

Code: [Select]

// PIC24EP256MC202 Configuration Bit Settings

// 'C' source line config statements

// FICD
#pragma config ICS = PGD3               // ICD Communication Channel Select bits (Communicate on PGEC3 and PGED3)
#pragma config JTAGEN = OFF             // JTAG Enable bit (JTAG is disabled)

// FPOR
#pragma config ALTI2C1 = OFF            // Alternate I2C1 pins (I2C1 mapped to SDA1/SCL1 pins)
#pragma config ALTI2C2 = OFF            // Alternate I2C2 pins (I2C2 mapped to SDA2/SCL2 pins)
#pragma config WDTWIN = WIN25           // Watchdog Window Select bits (WDT Window is 25% of WDT period)

// FWDT
#pragma config WDTPOST = PS32768        // Watchdog Timer Postscaler bits (1:32,768)
#pragma config WDTPRE = PR128           // Watchdog Timer Prescaler bit (1:128)
#pragma config PLLKEN = OFF             // PLL Lock Enable bit (Clock switch will not wait for the PLL lock signal.)
#pragma config WINDIS = OFF             // Watchdog Timer Window Enable bit (Watchdog Timer in Non-Window mode)
#pragma config FWDTEN = OFF             // Watchdog Timer Enable bit (Watchdog timer enabled/disabled by user software)

// FOSC
#pragma config POSCMD = NONE            // Primary Oscillator Mode Select bits (Primary Oscillator disabled)
//#pragma config OSCIOFNC = ON            // OSC2 Pin Function bit (OSC2 is general purpose digital I/O pin)
#pragma config OSCIOFNC = OFF           // OSC2 Pin Function bit (OSC2 is clock output)
#pragma config IOL1WAY = OFF            // Peripheral pin select configuration (Allow multiple reconfigurations)
#pragma config FCKSM = CSECMD           // Clock Switching Mode bits (Clock switching is enabled,Fail-safe Clock Monitor is disabled)

// FOSCSEL
#pragma config FNOSC = FRC              // Oscillator Source Selection (Internal Fast RC (FRC))
//#pragma config PWMLOCK = OFF            // PWM Lock Enable bit (PWM registers may be written without key sequence)
#pragma config PWMLOCK = ON             // PWM Lock Enable bit (Certain PWM registers may only be written after key sequence)
#pragma config IESO = OFF               // Two-speed Oscillator Start-up Enable bit (Start up with user-selected oscillator source)

// FGS
#pragma config GWRP = OFF               // General Segment Write-Protect bit (General Segment may be written)
#pragma config GCP = OFF                // General Segment Code-Protect bit (General Segment Code protect is Disabled)

// #pragma config statements should precede project file includes.
// Use project enums instead of #define for ON and OFF.

#include <xc.h>

int main(void)
{
    TRISBbits.TRISB5=0;
   
    while (1)
    {
        Nop();
        LATBbits.LATB5=1;
        LATBbits.LATB5=0;

        IOCON1bits.OSYNC=1;
        Nop();
        IOCON1bits.OSYNC=0;
        Nop();
    }
    return 0;
}

Code: [Select]
385 00300 FA0000 main LNK #0x0
386 00302 A9AE10 BCLR TRISB, #5
387 00304 000000 NOP
388 00306 A8AE14 BSET LATB, #5
389 00308 A9AE14 BCLR LATB, #5
390 0030A A80C22 BSET IOCON1, #0
391 0030C 000000 NOP
392 0030E A90C22 BCLR IOCON1, #0
393 00310 000000 NOP
394 00312 37FFF8 BRA 0x304


Edit: Note that I get the same behaviour with the OVRDAT0 bit.
« Last Edit: February 26, 2018, 11:21:21 pm by Howardlong »
 

Online JPortici

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Re: PIC24EP problem, double rmw to io register fails
« Reply #12 on: February 27, 2018, 07:08:34 am »
For example if you use bset twice to the same io register (different bits) sometimes it fails and not always the second! In my particular case this is to a register within the HSPWM
Which PIC24EP, and can you show us the code that fails? How often does it fail?



i remember him complaining about MPLABX, that it was extremely slow but omitting the completely irrelevant information that he was using an ancient PC with no SSD  ::)

I also want to know the part and the code so i can crosscheck, the HSPWM is a relatively newer and complex peripheral and there are caveats in how and when to write to certain register.
It's very possible that in some of the register you can't perform two RMW instructions in a row, and that it is stated in either the datasheet or the reference manual or both.

Regarding unlocking, as with other simillar operations the compiler provides builtins that guarantees the correct excecution of the unlocking sequence. they are described in the compiler manual and used in the examples provided in the reference manual
 

Offline Bruce Abbott

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Re: PIC24EP problem, double rmw to io register fails
« Reply #13 on: February 27, 2018, 11:00:19 am »
i remember him complaining about MPLABX, that it was extremely slow but omitting the completely irrelevant information that he was using an ancient PC with no SSD  ::)
Yeah we know, if you don't have the very latest top-of-the line hardware it's your fault if the bloatware runs slow.  ::)

Quote
I also want to know the part and the code so i can crosscheck, the HSPWM is a relatively newer and complex peripheral and there are caveats in how and when to write to certain register.
Or it's just buggy, but once again that's your fault for not having the latest chip revision (or if a bug-free version hasn't been released yet, expecting it to work...).

They tell me that any PIC with less than 5 digits is deprecated and I'm a criminal for running Windows XP, but I don't care. MPlab8 and PicKit2 may not do the latest PICs, but they work better and I don't need the latest PICs for my projects. My hobby is retro computing - and now my MCUs and development tools are too!

Quote from: fourtytwo42
Microchip are long past the point where they provide such detailed information to there users
which is a pity because that was their strong suit, making up their mediocre performance compared to other brands.

Anyway as an assembler programmer myself I am curious to see your code, as I have a few PIC24F's that I might want to use some day.

 
 
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Offline Howardlong

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Re: PIC24EP problem, double rmw to io register fails
« Reply #14 on: February 27, 2018, 12:19:21 pm »
 “Latest top of the range hardware”... like the ICD4, which I discovered doesn’t debug the PIC24EP (along with quite a few others, at least not even slightly reliably).
 
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Offline T3sl4co1l

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Re: PIC24EP problem, double rmw to io register fails
« Reply #15 on: February 27, 2018, 02:01:37 pm »
PIC24 bad enough, but PIC24E?  :scared:

I've worked on a project using that... the software guys didn't have much hair left.

As the hardware guy, I was in and out of that project in a couple months; the software guys put several years into it!  (Not that that's necessarily an implication against the CPU; you don't go that long without having concerns about project management or feature creep.)

It should be no surprise that the new-design boards for that customer used STM32s...  (The PIC24E persisted for two reasons: 1. adapting and improving existing customer design; 2. existing customer codebase.)

Tim
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Offline fourtytwo42Topic starter

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Re: PIC24EP problem, double rmw to io register fails
« Reply #16 on: February 27, 2018, 02:20:06 pm »
i remember him complaining about MPLABX, that it was extremely slow but omitting the completely irrelevant information that he was using an ancient PC with no SSD  ::)
If you wish to troll people go find someone else I can do without the likes of you!
 

Offline fourtytwo42Topic starter

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Re: PIC24EP problem, double rmw to io register fails
« Reply #17 on: February 27, 2018, 02:29:40 pm »
Thank you for your reply's first of all some code
   mov      #iocon2init,w0
   mov      w0,IOCON2
;   bset   IOCON2,#OVRDAT1
;   bset   IOCON2,#OVRDAT0
The commented out stuff doesnt work, the single mov works :)

So let me see, well I dont hate pics in fact I have been using them for years, I only made this post in case some other poor sod is trying to figure out why his/her code isn't working.

Yes tim I like the STM32 also but I dont use it because I am still building cpu's without pcb's in a small space, this does admitedly cause me problems with restricted numbers of io pins. For the present project a gti I can just about manage with this part (PIC24EP256MC202) but it's a close thing! I do pcb's sometimes for example audio dsp's where dip simply isnt available but I like to keep my costs down. Also when handling high power devices it's essential IMOP to have absolute control and do things fast hence assembly preferance. I have/do write tons of C for BIG processors but I dont consider a PIC in that way, its just an itsy bitsy machine control engine :)
 

Offline Howardlong

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Re: PIC24EP problem, double rmw to io register fails
« Reply #18 on: February 27, 2018, 02:54:45 pm »
Can you please give more context?

I may have missed it, but I couldn't see any reference regarding your PWMLOCK config bit setting.
 

Offline fourtytwo42Topic starter

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Re: PIC24EP problem, double rmw to io register fails
« Reply #19 on: February 27, 2018, 03:29:01 pm »
I am sorry you may have missed it because I dont dump irrelevent information here, if it were wrong (that it isn't) then how would one peice of code work and the other not ?
 

Offline T3sl4co1l

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Re: PIC24EP problem, double rmw to io register fails
« Reply #20 on: February 27, 2018, 03:56:03 pm »
Yes tim I like the STM32 also but I dont use it because I am still building cpu's without pcb's in a small space, this does admitedly cause me problems with restricted numbers of io pins. For the present project a gti I can just about manage with this part (PIC24EP256MC202) but it's a close thing! I do pcb's sometimes for example audio dsp's where dip simply isnt available but I like to keep my costs down. Also when handling high power devices it's essential IMOP to have absolute control and do things fast hence assembly preferance. I have/do write tons of C for BIG processors but I dont consider a PIC in that way, its just an itsy bitsy machine control engine :)

Speaking of C, the aforementioned project is all in C, just to fill that in..

I imagine, between libraries and early consternations, they solved low level register problems long ago.  Though I think there were still a few hangups here and there?  So, eh.. if you want to re-invent the wheel, you're welcome to, and you'll re-discover along the way many of the catches that happen, like the above.

Tim
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Bringing a project to life?  Send me a message!
 

Online JPortici

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Re: PIC24EP problem, double rmw to io register fails
« Reply #21 on: February 27, 2018, 04:37:45 pm »
Yeah we know, if you don't have the very latest top-of-the line hardware it's your fault if the bloatware runs slow.  ::)

I referenced that thread because apparently this was some "irrelevant information" when complaining about MPLABX.
It was not. My 2010 macbook with an SSD was fast enough, sure it took like 30 seconds to finish loading MPLABX compared to 5 in my current PC. And my current PC is a 7th gen NUC, nothing really fancy.

Quote
Quote
I also want to know the part and the code so i can crosscheck, the HSPWM is a relatively newer and complex peripheral and there are caveats in how and when to write to certain register.
Or it's just buggy, but once again that's your fault for not having the latest chip revision (or if a bug-free version hasn't been released yet, expecting it to work...).

perhaps, but if the documentation states that you can't do successive RMW instructions in certain register, it's not a bug.

Quote
They tell me that any PIC with less than 5 digits is deprecated and I'm a criminal for running Windows XP, but I don't care. MPlab8 and PicKit2 may not do the latest PICs, but they work better and I don't need the latest PICs for my projects. My hobby is retro computing - and now my MCUs and development tools are too!

not at all :) you are free to do what you want and i'm free to always suggest moving to modern/better/cheaper parts for work. I also take different choices in my hobby projects :)

Quote
Quote from: fourtytwo42
Microchip are long past the point where they provide such detailed information to there users
which is a pity because that was their strong suit, making up their mediocre performance compared to other brands.
[/quote]

or maybe the information is there somewhere you haven't looked. which is why asking for the part number is not asking to provide "irrelevant information".
documentation quality has gone down the drain compared to like 5 years ago, but i still think it's one of the best against say ST or ATMEL, or even NXP(Kinetis)

sorry for you, but i'm not trolling. i'm really trying to help.
 

Offline cv007

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Re: PIC24EP problem, double rmw to io register fails
« Reply #22 on: February 27, 2018, 08:12:36 pm »
Quote
I am sorry you may have missed it because I dont dump irrelevent information here, if it were wrong (that it isn't) then how would one peice of code work and the other not ?
Its relevant for this reason- IF you have PWMLOCK on, and you are not showing the 'irrelevant' code previous which does the unlock, then it could explain a problem-

your code (this is all we get to see)-
   mov      #iocon2init,w0
   mov      w0,IOCON2
;   bset   IOCON2,#OVRDAT1
;   bset   IOCON2,#OVRDAT0

maybe you are doing the unlock before this (we don't know), which could explain why the mov works and the bset does not.

According to the datasheet, the PWMUNLOCK sequence requires that the first sfr access following has to be a WRITE, so if using bset a read is thrown in there first which may prevent the write taking place since the unlock just failed. The mov would work as a WRITE is the first sfr access after the unlock code.

This may not be the case, but it certainly is a possibility. If you have PWMLOCK off, then never mind (but again, how would we know).
 

Offline Howardlong

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Re: PIC24EP problem, double rmw to io register fails
« Reply #23 on: February 27, 2018, 08:54:30 pm »
Quote
I am sorry you may have missed it because I dont dump irrelevent information here, if it were wrong (that it isn't) then how would one peice of code work and the other not ?
Its relevant for this reason- IF you have PWMLOCK on, and you are not showing the 'irrelevant' code previous which does the unlock, then it could explain a problem-

your code (this is all we get to see)-
   mov      #iocon2init,w0
   mov      w0,IOCON2
;   bset   IOCON2,#OVRDAT1
;   bset   IOCON2,#OVRDAT0

maybe you are doing the unlock before this (we don't know), which could explain why the mov works and the bset does not.

According to the datasheet, the PWMUNLOCK sequence requires that the first sfr access following has to be a WRITE, so if using bset a read is thrown in there first which may prevent the write taking place since the unlock just failed. The mov would work as a WRITE is the first sfr access after the unlock code.

This may not be the case, but it certainly is a possibility. If you have PWMLOCK off, then never mind (but again, how would we know).

Precisely.

I'm now not sure I should've spent the hour or so I've burned trying to reproduce the OPs problem in real hardware. At the moment, I am unable to reproduce it, unless the PWMLOCK config bit is set. Therefore, I don't see it as a bug, it is by design, unless I can be shown the precise context, including any unlock sequences and the PWMLOCK config bit.
 

Offline Bruce Abbott

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Re: PIC24EP problem, double rmw to io register fails
« Reply #24 on: February 28, 2018, 12:50:07 am »
Quote from: JPortici
I referenced that thread because apparently this was some "irrelevant information" when complaining about MPLABX.
Fair enough, but the 'irrelevant' reference to MPLabx was a bit obtuse so next time you might try being more direct (and BTW you shouldn't need an SSD to get reasonable performance).

I agree that the OP should provide sufficient code to reproduce the problem. That means including all the config bits and initialization code, preferably as part of a Minimal, Complete, and Verifiable Example that still fails with all (truly) irrelevant bits stripped out.

Thank you for your reply's first of all some code
   mov      #iocon2init,w0
   mov      w0,IOCON2
;   bset   IOCON2,#OVRDAT1
;   bset   IOCON2,#OVRDAT0
The commented out stuff doesnt work, the single mov works :)
You said "if you use bset twice to the same io register (different bits) sometimes it fails and not always the second". So does the code above fail sometimes, or always? Can you show an example of similar code that doesn't fail?
 





 


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