Happy to try it here, I have both PIC24EP256GP202 and PIC24EP256MC202 in stock if that helps. I have EP series with a larger numbers of pins in stock but they're less easy to breadboard.
Are you saying the RMW just is not working, or that the peripheral takes no notice of the setting?
I am wary of setting out on writing my own PWM code on this device as this specific PWM peripheral is very complex: I did some work on a dsPIC33 with a similar PWM peripheral a couple of years ago, it takes a lot of time to understand and get right. Happy to try your example code.
What I do note, if it's a PIC24EPXXXMC20X, that there's a config bit PWMLOCK that locks you out of changing the IOCONx and FCLCONx registers unless you write 0xABCD and 0x4321 to the PWMKEY register first. Section 16.1.2 of the datasheet, DS70000657H, page 226.
The code below I tested on a PIC24EP256MC202 and it won't set the bit on the register unless I compile the code with #pragma config PWMLOCK = OFF
// PIC24EP256MC202 Configuration Bit Settings
// 'C' source line config statements
// FICD
#pragma config ICS = PGD3 // ICD Communication Channel Select bits (Communicate on PGEC3 and PGED3)
#pragma config JTAGEN = OFF // JTAG Enable bit (JTAG is disabled)
// FPOR
#pragma config ALTI2C1 = OFF // Alternate I2C1 pins (I2C1 mapped to SDA1/SCL1 pins)
#pragma config ALTI2C2 = OFF // Alternate I2C2 pins (I2C2 mapped to SDA2/SCL2 pins)
#pragma config WDTWIN = WIN25 // Watchdog Window Select bits (WDT Window is 25% of WDT period)
// FWDT
#pragma config WDTPOST = PS32768 // Watchdog Timer Postscaler bits (1:32,768)
#pragma config WDTPRE = PR128 // Watchdog Timer Prescaler bit (1:128)
#pragma config PLLKEN = OFF // PLL Lock Enable bit (Clock switch will not wait for the PLL lock signal.)
#pragma config WINDIS = OFF // Watchdog Timer Window Enable bit (Watchdog Timer in Non-Window mode)
#pragma config FWDTEN = OFF // Watchdog Timer Enable bit (Watchdog timer enabled/disabled by user software)
// FOSC
#pragma config POSCMD = NONE // Primary Oscillator Mode Select bits (Primary Oscillator disabled)
//#pragma config OSCIOFNC = ON // OSC2 Pin Function bit (OSC2 is general purpose digital I/O pin)
#pragma config OSCIOFNC = OFF // OSC2 Pin Function bit (OSC2 is clock output)
#pragma config IOL1WAY = OFF // Peripheral pin select configuration (Allow multiple reconfigurations)
#pragma config FCKSM = CSECMD // Clock Switching Mode bits (Clock switching is enabled,Fail-safe Clock Monitor is disabled)
// FOSCSEL
#pragma config FNOSC = FRC // Oscillator Source Selection (Internal Fast RC (FRC))
//#pragma config PWMLOCK = OFF // PWM Lock Enable bit (PWM registers may be written without key sequence)
#pragma config PWMLOCK = ON // PWM Lock Enable bit (Certain PWM registers may only be written after key sequence)
#pragma config IESO = OFF // Two-speed Oscillator Start-up Enable bit (Start up with user-selected oscillator source)
// FGS
#pragma config GWRP = OFF // General Segment Write-Protect bit (General Segment may be written)
#pragma config GCP = OFF // General Segment Code-Protect bit (General Segment Code protect is Disabled)
// #pragma config statements should precede project file includes.
// Use project enums instead of #define for ON and OFF.
#include <xc.h>
int main(void)
{
TRISBbits.TRISB5=0;
while (1)
{
Nop();
LATBbits.LATB5=1;
LATBbits.LATB5=0;
IOCON1bits.OSYNC=1;
Nop();
IOCON1bits.OSYNC=0;
Nop();
}
return 0;
}
385 00300 FA0000 main LNK #0x0
386 00302 A9AE10 BCLR TRISB, #5
387 00304 000000 NOP
388 00306 A8AE14 BSET LATB, #5
389 00308 A9AE14 BCLR LATB, #5
390 0030A A80C22 BSET IOCON1, #0
391 0030C 000000 NOP
392 0030E A90C22 BCLR IOCON1, #0
393 00310 000000 NOP
394 00312 37FFF8 BRA 0x304
Edit: Note that I get the same behaviour with the OVRDAT0 bit.
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