Post the best design on opencores that you know of

[mrflibble]

Post the best design on opencores that you have come across. Could be big, could be small, doesn't matter. Just a design that excelled in some way. Good code readability, awesome design, well organized and usable documentation (hah, as if!).

And since I started this thread, I'll go first:

... nope, can't think of a single one. I could go back to try and find the least crappy one that I evaluated and post that url, but that's not really the idea. Guess that should be "Post the best design on opencores that you have come across and found actually useful" then. Here's hoping I just had bad luck or I generate vacuum at locating useful design resources.

[GiskardReventlov]

I had the same feeling when I looked but this was a while ago. Sounds like it's not changed much.
 

[mrflibble]

It's been a while for me as well... So I cannot speak for the current state of affairs, but I have my suspicions. It's just that in the past I have tried it on various occasions for different types of designs. And lets say the experience was suboptimal.

It could very well be that the type of design I needed at the moment was represented by only crap, while there were gems to be had if only you were looking for something else. So I am hoping to find out what that hypothetical something else might be.

[theatrus]

OpenRISC? It's at least used

[mrflibble]

OpenRISC? It's at least used

Used by you or by someone else?

I can also think of popular names (milkymist springs to mind for some random reason), but I was looking for something that people here have actually worked with and found pleasant to work with.

[westfw]

Hypothetically, would you count a good implementation of an 8051 core, or reject it because it's an 8051?  Likewise, would you reject a core that didn't implement some standard architecture, because of toolchain issues for assemble/compile/debug?   What about architectures that are merely "really old" ?

This is a real, and difficult question.  I know that I've looked at some popular commercial microcontrollers recently and thought "Eww.  It's unpleasantly like a Z80 with a bunch of bells and whistles attached, and a single-source C compiler."  Or even: "I loved the PDP10.  But without the whole ecosystem that surrounded it, including the "significant user base", I'm not really inclined to want to spend much time programming one, any more."

And people are rejecting PIC32s because they only use the 2nd most popular (?) purchasable CPU IP...

[hans]

For a graduation project I had 10 temperature 1-wire (onto really 1 wire) sensors hooked up to a FPGA. We used a NIOS2 soft processor.
1-wire was chosen to reduce wiring harness, but it's not really a pleasant protocol to work with. Maybe the timing is easy to do on a FPGA, never really looked in to that, because this opencore was really useful & easy to use:
https://github.com/jeras/sockit_owm

As I can remember, it was basically drag&drop in SOPC builder, add tristate buffer to the I/O pad & build the project.
After that, the NIOS software was justy call the acquire/find functions and I had a complete listing of 1-wire devices & live temperature readout.

But.. if you never use 1-wire (which I personally do try to avoid) it's probably of no use at all.
(after the project was over, however, I got a mail that the seamless integration didn't work and asked how I got it to work.. well, by doing not so much, so IDK ).

[Balaur]

Between my colleagues and myself, I think we've used a dozen of designs from OpenCores. The context is a bit special since these works have been mostly performed for research and publication purposes in microelectronics design and verification.

The process is as follows: let's select a good design (Ethernet 10GE MAC it's an all-time favorite), optionally use the Si2 NanGate Open Cell Library as a target process and presto, you have a very nice test case, no proprietary stuff, that everyone else can duplicate to verify/follow up/extend/shoot down in flames your work.

We have also used a few cores (FPU , AES, UART, CORDIC) in a couple of designs that actually went on silicon (in a R&D setting though).

The statistics adequately proves opencores' interest to the community.

[Codemonkey]

Used by you or by someone else?

I worked with the Jennic JN5121 and JN5139 SoC devices, they were OpenRISC based.

[westfw]

Out of curiosity, what do licenses like GPL or LGPL *mean* as applied to hardware description languages?

[codeboy2k]

IANAL, but I presume the same things apply as has been defacto for all software written in any other language and covered by the GPL or LGPL.

succinctly:
 GPL: you are free to use, change, derive from, but you must release your own code under the same GPL
 LGPL: you are free to use, change, derive from, etc. and you must release your changes to the LGPL'd code, but you are not required to release your own source code that the LGPL'd code is included into.
 
the GPL and LGPL would not extend to the hardware device that uses the 'compiled' HDL. 

[mrflibble]

Hypothetically, would you count a good implementation of an 8051 core, or reject it because it's an 8051?  Likewise, would you reject a core that didn't implement some standard architecture, because of toolchain issues for assemble/compile/debug?   What about architectures that are merely "really old" ?

Sure, why not. I'm just interested to hear about some positive experiences with design XYZ on opencores. So if a 8051 core happens to be well implemented and wonder of wonders happens to have good documentation as well, then that definitely "qualifies".

[nctnico]

Would the Wishbone bus qualify? Yet documentation seems to be lacking beyond the basics.

[mrflibble]

Would the Wishbone bus qualify? Yet documentation seems to be lacking beyond the basics.

You are the judge for that qualification. 

Just a design that excelled in some way. Good code readability, awesome design, well organized and usable documentation (hah, as if!).

And preferably one that you had first hand experience with. I am genuinely curious what cores people found on there that they considered to be a boost to their productivity and incorporated into their project.

[Smokey]

I haven't used it personally, but it looks like the tri-mode ethernet (10, 100, 1000) core is used in some stuff that turns up on google and has decent looking documentation.  Anyone used that core?

http://opencores.org/project,ethernet_tri_mode

(This is kind of funny since I was just thinking of figuring out how hard it would be to put gigabit ethernet on an fpga)

[Anks]

Well there is the chance. Sort it If it matters to you that much. No one asked you to use or evaluate them. OK an opinion is welcome most times but as it is with YouTube you don't have to.

[legacy]

Used by you or by someone else?

I worked with the Jennic JN5121 and JN5139 SoC devices, they were OpenRISC based.

are they soft core ?

[scientist]

It's not like the GPL can force you to release your source code.

The J1 Forth CPU (http://www.excamera.com/sphinx/fpga-j1.html) isn't on OpenCores, but it's freely available and is probably fine (if you use Forth).

[legacy]

so fine that from gameduino1 to gameduino21 we have switched to a gpu chip 

[legacy]

to be honest i am still looking for a good an easy SoC, the ZPU seems the best one i have found