Project update: SushiBits Apocalia aka 80C88 retrocomputer

[technix]

This project has received some updates, and parts of its specs is being finalized.

Apocalia is a modular retrocomputing platform based on an OKI M80C88 processor. It can be made DOS compatible but that is not yet finalized spec. Here are some finalized specs:

* Overall form factor: a stack of PC104/64 boards. Rationale: PC104 physical size is within JLCPCB discounted rate size limit, and after removing 40-pin P2 the 64 remaining P1 pins corresponds to the XT bus.
* Core Complex Module (Apocalia CCM) contains the CPU, FPU, bus interface, 15MHz main clock, 82C59 PIC and 82C37 DMA.
* System Service Module (Apocalia SSM) contains 640kB SRAM, 64kB EEPROM, DS12C887 RTC, 82C53 PIT and PIC16F887A system controller and power supply converters. Special jumper exist between CCM and SSM.
* Mass Storage Module (Apocalia MSM) is a hard card based on a mSATA SSD. It is implemented as a CPLD variant of XT-IDE chained directly to a IDE to SATA adapter.
* Flexible Display Module (Apocalia FDM) is a graphics dual-board module based on FlexCGA, a variant of CGA with dual port RAM replacing the character ROM. Due to size limits, it relies heavily on dual-port SRAM and CPLD-condensed logic. Output are taken from the RGBI interface and fed through a post-renderer that emits parallel LCD as an intermediary format, then converted into HDMI. The post-renderer can both emit straight RGBI colors and emulate NTSC color artifacts. Audio is taken using a separate I2S jumper from the sound module.
* FM Sound Module (Apocalia FSM, not finalized yet) is based on OPL3, but with a processor or FPGA replacing the floating point DAC to emit digital I2S without the analog gap for the FDM HDMI encoder. It is mostly AdLib-compatible.
* Connectivity Module (Apocalia HCM, imcomplete) implements three separate functionalities: a 100Mbps Ethernet port based on DM9000A, and USB Full Speed OTG based on CH374, and a quad serial port interface. COM1 is exposed as a 9-pin RS232, COM2 is exposed as a USB serial port, COM3 and COM4 are TTL-level pin headers. USB OTG direction detection is implemented as a flow control pin on COM2.

The BIOS (not finalized) is largely based on SeaBIOS, with the default boot sequence USB OTG on HCM -> SSD on MSM -> serial console on COM2.

The minimal bootable system contains CCM, SSM and HCM. The full system can be made IBM compatible if the interface CPLDs are programmed to put devices in their correct addresses.