Pull ups on FPGAs?

[bentomo]

So I'm using an ICE40HX8K and I've synthesized a design and I cannot figure out why my output is not being driven. I'm expecting a 3.3v peak but only get about 400mv of range. This seems to be the case for all of my outputs.

I eventually stepped back and just wired my input clock to an output pin just to make sure it wasn't my logic, but still no luck.

I can see the frequency so I know the signal is getting through but it's only in the 0-500mV range. So it seems like the internal pull-up pin wasn't working. I attached an external pullup pin and now it's just a 3.3v centered 400mV peak-to-peak wave that matches the clock of my input frequency.

So my question is, how do output drivers generally work on FPGAs? It looks like I've enabled what I need to in software. The best documentation I could find on this is page 10 of the family data sheet. But this seems like a trivial thing and I'm not sure what I'm missing.

My test code is essentially

VClock : in std_logic;
TFTLCDCLK : out std_logic;

signal VClockI: std_logic;

VClockI <= not VClock;
TFTLCDCLK <= VClockI;

signal VClockI


I'm starting to think I should throw away this lattice stuff and go get a spartan 6 board.

[jm_araujo]

(No experience with FPGAs, so could be a stupid question)

Have you wired the VCCIO_x correctly for all the banks?

[FrankBuss]

Did you define the right IO type in the Lattice Diamond Port Assignment spreadsheet? Maybe it is configured as LVDS.

[james_s]

Pullups are used on inputs, the output should be a totem pole that is actively driven low or high. Do check the configuration as suggested, and also make sure you are not using a special purpose pin. Many FPGAs have a few pins that are input-only feeding the global clock network or dedicated to some special function.

[bentomo]

There HAS to be a name for a phenomenon of figuring something out as soon as you ask someone about it. Spent about a day on this and as soon as I make the post I noticed that my jumpers were on backwards.

So I was programming the devices CRAM and resetting it every time I moved from USB to my test bench. I fixed the jumper and viola, a clock output.

Maybe I was seeing what I wanted to see in the messy waveforms. 

Thanks for the quick responses as always guys.

[mrflibble]

You could check the bit about physical constraints on page 17, and inspecting pins in the package viewer on page 21-22.

http://www.latticesemi.com/~/media/LatticeSemi/Documents/Tutorials/AK/iCEcube2Tutorial.pdf