I have to burst the ADC with 30MHz bursts (as datasheet says) to achieve its maximum channel sampling which is not possible with timer triggering and burst method. The timer works at 60MHz itself.
I think you are under a misconception: 30MHz is the ADC clock, that you derive from the clock tree.
This must be always running, no need to turn it on and off, and is used to keep the internal ADC machinery running.
It's not the ADC sampling rate (but of course it's related!).
Then, you can trigger the ADC with the TRGO (from update or compare events) of a timer, or a choice of other methods.
The maximum frequency this can be done cannot exceed 2MHz, if using a single ADC (see table 67 in the F407 datasheet), less if using an external trigger, more if interleaving two or three ADCs.
So the two timer solution is still the best one.