I have a two-fold question regarding pin assignments in Quartus II.
I'm writing up a quick little logic circuit that I need for a project, targeted for a MAX3000 CPLD (44-pin TQFP). The design uses up all 34 IO pins. I noticed when I let Quartus II do the pin assignments, there seemed to be absolutely no logic behind its placement decisions. Inputs were thoroughly mixed in with outputs, and vectors were nowhere near in order. It literally looked like someone had taken all my pin names, written them down on playing cards, and then shuffled the deck multitudes of time before assigning them in their resulting order. Why does it do this?
Secondly, I attempted to place half of the pins myself, and let the software auto-place the other half. I grouped all my inputs on two sides of the chip, and made sure my vector bits were in order from least significant bit to greatest. When I went to synthesize my design, the fitter failed, saying that I had "assigned too many input pins". I only assigned the input pins that were a part of my design. What in the world does this mean?
All I want to do is assign my pins in some sane, rational ordering!