The manfacturers provide an IDE. That IDE should be designed to make development easier, quicker and less prone to errors.
As has been already said, FPGA software IDEs are lagging many years behind software IDEs, and the stupid thing is that compared to the work involved in the insane complexity of compiling an HDL description into an efficiently placed & routed FPGA, making the IDE mode useable is trivial.
One issue is that many of the tools are clearly bought in, probably from different vendors - a typical compile can show at least half a dozen different names in the copyright messages.
The FPGA EDA flow is conceptually (and actually) much closer to ASIC EDA design flows. You start from the same input HDL files, you use similar (and in some cases identical) synthesis, simulation, place & route tools and you work in the same way in both flows.
I'm not trying to defend the current status of the semiconductor EDA industry (well, I might be biased since I'm both a designer and an EDA tool vendor), but I don't find IDEs (or the lack of) to be a show stopper. At the design flow that it is usually required by FPGA works (i.e. mostly frontend) working without a GUI is a non-issue.
Basically, most design flows are highly automated in the sense that somebody will invest significant effort to build a flow that works correctly for a given set of conditions (mostly determined by the target implementation technology or platform). Then, the majority of designing efforts happens iteratively inside this flow, using (almost exclusively) text input files, and a series of highly repeatable operations (make synthesis, make simulation, ...). Nobody wants to use a GUI/IDE because it's prone to error and operator fatigue. You make your modifications, type "make validation" or whatever and you have your (textual) report. Yes, it may have run tens of highly specific EDA tools from various vendors, but I have my report and I'm happy for that.
Moreover, we are talking about relatively heavy operations. We have FPGA design flows that may take hours to complete. We use Design Validation Environments that take days to exhaustively verify that your design fits some functional specifications or whatever. All that runs on remote Linux Server Farms. You don't want to work interactively or using a IDE or GUI to do all this.
On the EDA software side, even our tools (that are relatively mid-complexity when compared to standard EDA behemoths) have completely automated build processes. I want/need to modify something. Good, edit the *.c file, type "make package" or "make package-customer-x" and there, you have your stuff building up for you, minimizing manipulation or procedure errors.
Best regards,
Dan